[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrSSE.td

Evan Cheng evan.cheng at apple.com
Fri Apr 7 17:47:57 PDT 2006



Changes in directory llvm/lib/Target/X86:

X86InstrSSE.td updated: 1.67 -> 1.68
---
Log message:

ldmxcsr and stmxcsr.


---
Diffs of the changes:  (+6 -2)

 X86InstrSSE.td |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/X86/X86InstrSSE.td
diff -u llvm/lib/Target/X86/X86InstrSSE.td:1.67 llvm/lib/Target/X86/X86InstrSSE.td:1.68
--- llvm/lib/Target/X86/X86InstrSSE.td:1.67	Fri Apr  7 16:20:58 2006
+++ llvm/lib/Target/X86/X86InstrSSE.td	Fri Apr  7 19:47:44 2006
@@ -1538,9 +1538,13 @@
 def SFENCE : I<0xAE, MRM7m, (ops),
                "sfence", []>, TB, Requires<[HasSSE1]>;
 
-// Load MXCSR register
+// MXCSR register
 def LDMXCSR : I<0xAE, MRM2m, (ops i32mem:$src),
-                "ldmxcsr {$src|$src}", []>, TB, Requires<[HasSSE1]>;
+                "ldmxcsr $src",
+                [(int_x86_sse_ldmxcsr addr:$src)]>, TB, Requires<[HasSSE1]>;
+def STMXCSR : I<0xAE, MRM3m, (ops i32mem:$dst),
+                "stmxcsr $dst",
+                [(int_x86_sse_stmxcsr addr:$dst)]>, TB, Requires<[HasSSE1]>;
 
 //===----------------------------------------------------------------------===//
 // Alias Instructions






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