[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp AlphaInstrInfo.td

Andrew Lenharth alenhar2 at cs.uiuc.edu
Sun Apr 2 21:19:30 PDT 2006



Changes in directory llvm/lib/Target/Alpha:

AlphaISelDAGToDAG.cpp updated: 1.37 -> 1.38
AlphaInstrInfo.td updated: 1.118 -> 1.119
---
Log message:

support x * (c1 + c2) where c1 and c2 are pow2s.  special case for c2 == 4

---
Diffs of the changes:  (+32 -10)

 AlphaISelDAGToDAG.cpp |    2 +-
 AlphaInstrInfo.td     |   40 +++++++++++++++++++++++++++++++---------
 2 files changed, 32 insertions(+), 10 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.37 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.38
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.37	Sun Apr  2 22:18:59 2006
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp	Sun Apr  2 23:19:17 2006
@@ -77,7 +77,7 @@
       uint64_t complow = 1 << (63 - at);
       uint64_t comphigh = 1 << (64 - at);
       //std::cerr << x << ":" << complow << ":" << comphigh << "\n";
-      if (abs(complow - x) < abs(comphigh - x))
+      if (abs(complow - x) <= abs(comphigh - x))
         return complow;
       else
         return comphigh;


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.118 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.119
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.118	Sun Apr  2 22:18:59 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Sun Apr  2 23:19:17 2006
@@ -60,6 +60,10 @@
 def nearP2X : SDNodeXForm<imm, [{
   return getI64Imm(Log2_64(getNearPower2((uint64_t)N->getValue())));
 }]>;
+def nearP2RemX : SDNodeXForm<imm, [{
+  uint64_t x = abs(N->getValue() - getNearPower2((uint64_t)N->getValue()));
+  return getI64Imm(Log2_64(x));
+}]>;
 
 def immUExt8  : PatLeaf<(imm), [{ //imm fits in 8 bit zero extended field
   return (uint64_t)N->getValue() == (uint8_t)N->getValue();
@@ -84,26 +88,39 @@
   return true;
 }]>;
 def immRem1 : PatLeaf<(imm), [{
-  return (int64_t)getNearPower2((uint64_t)N->getValue()) - (int64_t)N->getValue() == -1;
+  return N->getValue() - getNearPower2((uint64_t)N->getValue()) == 1;
 }]>;
 def immRem3 : PatLeaf<(imm), [{
-  return (int64_t)getNearPower2((uint64_t)N->getValue()) - (int64_t)N->getValue() == -3;
+  return N->getValue() - getNearPower2((uint64_t)N->getValue()) == 3;
+}]>;
+def immRem4 : PatLeaf<(imm), [{
+  return N->getValue() - getNearPower2((uint64_t)N->getValue()) == 4;
 }]>;
 def immRem5 : PatLeaf<(imm), [{
-  return (int64_t)getNearPower2((uint64_t)N->getValue()) - (int64_t)N->getValue() == -5;
+  return N->getValue() - getNearPower2((uint64_t)N->getValue()) == 5;
 }]>;
 def immRem1n : PatLeaf<(imm), [{
-  return (int64_t)getNearPower2((uint64_t)N->getValue()) - N->getValue() == 1;
+  return getNearPower2((uint64_t)N->getValue()) - N->getValue() == 1;
 }]>;
 def immRem3n : PatLeaf<(imm), [{
-  return (int64_t)getNearPower2((uint64_t)N->getValue()) - N->getValue() == 3;
+  return getNearPower2((uint64_t)N->getValue()) - N->getValue() == 3;
+}]>;
+def immRem4n : PatLeaf<(imm), [{
+  return getNearPower2((uint64_t)N->getValue()) - N->getValue() == 4;
 }]>;
 def immRem5n : PatLeaf<(imm), [{
-  return (int64_t)getNearPower2((uint64_t)N->getValue()) - N->getValue() == 5;
+  return getNearPower2((uint64_t)N->getValue()) - N->getValue() == 5;
+}]>;
+def immRemP2n : PatLeaf<(imm), [{
+  return isPowerOf2_64(getNearPower2((uint64_t)N->getValue()) - N->getValue());
+}]>;
+def immRemP2 : PatLeaf<(imm), [{
+  return isPowerOf2_64(N->getValue() - getNearPower2((uint64_t)N->getValue()));
 }]>;
 def immUExt8ME : PatLeaf<(imm), [{ //use this imm for mulqi
-  int64_t d = (int64_t)getNearPower2((uint64_t)N->getValue()) - N->getValue();
-  switch (abs(d)) {
+  int64_t d =  abs((int64_t)N->getValue() - (int64_t)getNearPower2((uint64_t)N->getValue()));
+  if (isPowerOf2_64(d)) return false;
+  switch (d) {
     case 1: case 3: case 5: return false; 
     default: return (uint64_t)N->getValue() == (uint8_t)N->getValue();
   };
@@ -915,6 +932,10 @@
           (ADDQ (SL GPRC:$RA, (nearP2X immRem3:$imm)), (S4SUBQ GPRC:$RA, GPRC:$RA))>;
 def : Pat<(mul GPRC:$RA, immRem5:$imm),
           (ADDQ (SL GPRC:$RA, (nearP2X immRem5:$imm)), (S4ADDQ GPRC:$RA, GPRC:$RA))>;
+def : Pat<(mul GPRC:$RA, immRem4:$imm),
+          (S4ADDQ GPRC:$RA, (SL GPRC:$RA, (nearP2X immRem4:$imm)))>;
+def : Pat<(mul GPRC:$RA, immRemP2:$imm),
+          (ADDQ (SL GPRC:$RA, (nearP2X immRemP2:$imm)), (SLi GPRC:$RA, (nearP2RemX immRemP2:$imm)))>;
 
 def : Pat<(mul GPRC:$RA, immRem1n:$imm), 
           (SUBQ (SL GPRC:$RA, (nearP2X immRem1n:$imm)), GPRC:$RA)>;
@@ -922,4 +943,5 @@
           (SUBQ (SL GPRC:$RA, (nearP2X immRem3n:$imm)), (S4SUBQ GPRC:$RA, GPRC:$RA))>;
 def : Pat<(mul GPRC:$RA, immRem5n:$imm),
           (SUBQ (SL GPRC:$RA, (nearP2X immRem5n:$imm)), (S4ADDQ GPRC:$RA, GPRC:$RA))>;
-
+def : Pat<(mul GPRC:$RA, immRemP2n:$imm),
+          (SUBQ (SL GPRC:$RA, (nearP2X immRemP2n:$imm)), (SLi GPRC:$RA, (nearP2RemX immRemP2n:$imm)))>;






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