[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Chris Lattner lattner at cs.uiuc.edu
Tue Mar 28 12:24:55 PST 2006



Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.341 -> 1.342
---
Log message:

Teach Legalize how to pack VVECTOR_SHUFFLE nodes into VECTOR_SHUFFLE nodes.


---
Diffs of the changes:  (+21 -0)

 LegalizeDAG.cpp |   21 +++++++++++++++++++++
 1 files changed, 21 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.341 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.342
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.341	Mon Mar 27 18:40:09 2006
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Tue Mar 28 14:24:43 2006
@@ -4532,6 +4532,27 @@
                            Node->getOperand(1), Node->getOperand(2));
     }
     break;
+  case ISD::VVECTOR_SHUFFLE:
+    if (!MVT::isVector(NewVT)) {
+      // Returning a scalar?  Figure out if it is the LHS or RHS and return it.
+      SDOperand EltNum = Node->getOperand(2).getOperand(0);
+      if (cast<ConstantSDNode>(EltNum)->getValue())
+        Result = PackVectorOp(Node->getOperand(1), NewVT);
+      else
+        Result = PackVectorOp(Node->getOperand(0), NewVT);
+    } else {
+      // Otherwise, return a VECTOR_SHUFFLE node.  First convert the index
+      // vector from a VBUILD_VECTOR to a BUILD_VECTOR.
+      std::vector<SDOperand> BuildVecIdx(Node->getOperand(2).Val->op_begin(),
+                                         Node->getOperand(2).Val->op_end()-2);
+      MVT::ValueType BVT = MVT::getIntVectorWithNumElements(BuildVecIdx.size());
+      SDOperand BV = DAG.getNode(ISD::BUILD_VECTOR, BVT, BuildVecIdx);
+      
+      Result = DAG.getNode(ISD::VECTOR_SHUFFLE, NewVT,
+                           PackVectorOp(Node->getOperand(0), NewVT),
+                           PackVectorOp(Node->getOperand(1), NewVT), BV);
+    }
+    break;
   case ISD::VBIT_CONVERT:
     if (Op.getOperand(0).getValueType() != MVT::Vector)
       Result = DAG.getNode(ISD::BIT_CONVERT, NewVT, Op.getOperand(0));






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