[llvm-commits] CVS: llvm/include/llvm/Intrinsics.td

[Evan Cheng]

Changes in directory llvm/include/llvm:

Intrinsics.td updated: 1.21 -> 1.22
---
Log message:

X86 SSE1 cacheability support ops intrinsics

---
Diffs of the changes:  (+21 -2)

 Intrinsics.td |   23 +++++++++++++++++++++--
 1 files changed, 21 insertions(+), 2 deletions(-)


Index: llvm/include/llvm/Intrinsics.td
diff -u llvm/include/llvm/Intrinsics.td:1.21 llvm/include/llvm/Intrinsics.td:1.22
--- llvm/include/llvm/Intrinsics.td:1.21	Fri Mar 24 20:02:51 2006
+++ llvm/include/llvm/Intrinsics.td	Sat Mar 25 00:05:45 2006
@@ -626,7 +626,6 @@
 }
 
 // SIMD load ops
-
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse_loadhps : GCCBuiltin<"__builtin_ia32_loadhps">,
               Intrinsic<[llvm_v4f32_ty, llvm_ptr_ty], [IntrReadMem]>;
@@ -643,7 +642,6 @@
 }
 
 // SIMD store ops
-
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse_storehps : GCCBuiltin<"__builtin_ia32_storehps">,
               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
@@ -659,6 +657,27 @@
               Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
 }
 
+// Cacheability support ops
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_sse_prefetch : GCCBuiltin<"__builtin_ia32_prefetch">,
+              Intrinsic<[llvm_ptr_ty, llvm_int_ty], [IntrWriteMem]>;
+}
+
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_sse_movntq : GCCBuiltin<"__builtin_ia32_movntq">,
+              Intrinsic<[llvm_ptr_ty, llvm_v2i32_ty], [IntrWriteMem]>;
+}
+
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_sse_movntps : GCCBuiltin<"__builtin_ia32_movntps">,
+              Intrinsic<[llvm_ptr_ty, llvm_v4f32_ty], [IntrWriteMem]>;
+}
+
+let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
+  def int_x86_sse_sfence : GCCBuiltin<"__builtin_ia32_sfence">,
+              Intrinsic<[llvm_void_ty], [IntrWriteMem]>;
+}
+
 let TargetPrefix = "x86" in {  // All intrinsics start with "llvm.x86.".
   def int_x86_sse_movmskps : GCCBuiltin<"__builtin_ia32_movmskps">,
               Intrinsic<[llvm_int_ty, llvm_v4f32_ty], [InstrNoMem]>;