[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelLowering.cpp X86TargetMachine.cpp

Evan Cheng evan.cheng at apple.com
Thu Mar 16 13:47:56 PST 2006



Changes in directory llvm/lib/Target/X86:

X86ISelLowering.cpp updated: 1.105 -> 1.106
X86TargetMachine.cpp updated: 1.107 -> 1.108
---
Log message:

Added a way for TargetLowering to specify what values can be used as the
scale component of the target addressing mode.


---
Diffs of the changes:  (+12 -2)

 X86ISelLowering.cpp  |   10 ++++++++++
 X86TargetMachine.cpp |    4 ++--
 2 files changed, 12 insertions(+), 2 deletions(-)


Index: llvm/lib/Target/X86/X86ISelLowering.cpp
diff -u llvm/lib/Target/X86/X86ISelLowering.cpp:1.105 llvm/lib/Target/X86/X86ISelLowering.cpp:1.106
--- llvm/lib/Target/X86/X86ISelLowering.cpp:1.105	Mon Mar 13 17:18:16 2006
+++ llvm/lib/Target/X86/X86ISelLowering.cpp	Thu Mar 16 15:47:42 2006
@@ -49,6 +49,16 @@
   setSchedulingPreference(SchedulingForRegPressure);
   setShiftAmountFlavor(Mask);   // shl X, 32 == shl X, 0
   setStackPointerRegisterToSaveRestore(X86::ESP);
+
+  // Add legal addressing mode scale values.
+  addLegalAddressScale(8);
+  addLegalAddressScale(4);
+  addLegalAddressScale(2);
+  // Enter the ones which require both scale + index last. These are more
+  // expensive.
+  addLegalAddressScale(9);
+  addLegalAddressScale(5);
+  addLegalAddressScale(3);
   
   // Set up the register classes.
   addRegisterClass(MVT::i8, X86::R8RegisterClass);


Index: llvm/lib/Target/X86/X86TargetMachine.cpp
diff -u llvm/lib/Target/X86/X86TargetMachine.cpp:1.107 llvm/lib/Target/X86/X86TargetMachine.cpp:1.108
--- llvm/lib/Target/X86/X86TargetMachine.cpp:1.107	Mon Mar 13 17:20:37 2006
+++ llvm/lib/Target/X86/X86TargetMachine.cpp	Thu Mar 16 15:47:42 2006
@@ -97,7 +97,7 @@
       FileType != TargetMachine::ObjectFile) return true;
 
   // Run loop strength reduction before anything else.
-  if (EnableX86LSR) PM.add(createLoopStrengthReducePass(1, &TLInfo));
+  if (EnableX86LSR) PM.add(createLoopStrengthReducePass(&TLInfo));
 
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());
@@ -166,7 +166,7 @@
 
   // Run loop strength reduction before anything else.
   if (EnableX86LSR)
-    PM.add(createLoopStrengthReducePass(1, TM.getTargetLowering()));
+    PM.add(createLoopStrengthReducePass(TM.getTargetLowering()));
 
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());






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