[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp PPCInstrInfo.h PPCRegisterInfo.cpp PPCRegisterInfo.h
Chris Lattner
lattner at cs.uiuc.edu
Thu Feb 2 12:12:45 PST 2006
Changes in directory llvm/lib/Target/PowerPC:
PPCInstrInfo.cpp updated: 1.13 -> 1.14
PPCInstrInfo.h updated: 1.9 -> 1.10
PPCRegisterInfo.cpp updated: 1.42 -> 1.43
PPCRegisterInfo.h updated: 1.9 -> 1.10
---
Log message:
Move isLoadFrom/StoreToStackSlot from MRegisterInfo to TargetInstrInfo,a far more logical place. Other methods should also be moved if anyoneis interested. :)
---
Diffs of the changes: (+21 -20)
PPCInstrInfo.cpp | 19 +++++++++++++++++++
PPCInstrInfo.h | 2 ++
PPCRegisterInfo.cpp | 18 ------------------
PPCRegisterInfo.h | 2 --
4 files changed, 21 insertions(+), 20 deletions(-)
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.13 llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.14
--- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:1.13 Tue Oct 18 20:50:36 2005
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.cpp Thu Feb 2 14:12:32 2006
@@ -79,6 +79,25 @@
return false;
}
+unsigned PPCInstrInfo::isLoadFromStackSlot(MachineInstr *MI,
+ int &FrameIndex) const {
+ switch (MI->getOpcode()) {
+ default: break;
+ case PPC::LD:
+ case PPC::LWZ:
+ case PPC::LFS:
+ case PPC::LFD:
+ if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImmedValue() &&
+ MI->getOperand(2).isFrameIndex()) {
+ FrameIndex = MI->getOperand(2).getFrameIndex();
+ return MI->getOperand(0).getReg();
+ }
+ break;
+ }
+ return 0;
+ }
+
+
// commuteInstruction - We can commute rlwimi instructions, but only if the
// rotate amt is zero. We also have to munge the immediates a bit.
MachineInstr *PPCInstrInfo::commuteInstruction(MachineInstr *MI) const {
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.h
diff -u llvm/lib/Target/PowerPC/PPCInstrInfo.h:1.9 llvm/lib/Target/PowerPC/PPCInstrInfo.h:1.10
--- llvm/lib/Target/PowerPC/PPCInstrInfo.h:1.9 Wed Jan 18 13:37:44 2006
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.h Thu Feb 2 14:12:32 2006
@@ -39,6 +39,8 @@
unsigned& sourceReg,
unsigned& destReg) const;
+ unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
+
// commuteInstruction - We can commute rlwimi instructions, but only if the
// rotate amt is zero. We also have to munge the immediates a bit.
virtual MachineInstr *commuteInstruction(MachineInstr *MI) const;
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.42 llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.43
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1.42 Wed Jan 11 17:16:29 2006
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp Thu Feb 2 14:12:32 2006
@@ -116,24 +116,6 @@
}
}
-unsigned PPCRegisterInfo::isLoadFromStackSlot(MachineInstr *MI,
- int &FrameIndex) const {
- switch (MI->getOpcode()) {
- default: break;
- case PPC::LD:
- case PPC::LWZ:
- case PPC::LFS:
- case PPC::LFD:
- if (MI->getOperand(1).isImmediate() && !MI->getOperand(1).getImmedValue() &&
- MI->getOperand(2).isFrameIndex()) {
- FrameIndex = MI->getOperand(2).getFrameIndex();
- return MI->getOperand(0).getReg();
- }
- break;
- }
- return 0;
-}
-
/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
/// copy instructions, turning them into load/store instructions.
MachineInstr *PPCRegisterInfo::foldMemoryOperand(MachineInstr *MI,
Index: llvm/lib/Target/PowerPC/PPCRegisterInfo.h
diff -u llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.9 llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.10
--- llvm/lib/Target/PowerPC/PPCRegisterInfo.h:1.9 Sun Oct 16 00:39:50 2005
+++ llvm/lib/Target/PowerPC/PPCRegisterInfo.h Thu Feb 2 14:12:32 2006
@@ -42,8 +42,6 @@
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
- unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
-
/// foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into
/// copy instructions, turning them into load/store instructions.
virtual MachineInstr* foldMemoryOperand(MachineInstr* MI, unsigned OpNum,
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