[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaInstrFormats.td AlphaInstrInfo.td

Andrew Lenharth alenhar2 at cs.uiuc.edu
Wed Jan 25 19:24:27 PST 2006



Changes in directory llvm/lib/Target/Alpha:

AlphaInstrFormats.td updated: 1.24 -> 1.25
AlphaInstrInfo.td updated: 1.108 -> 1.109
---
Log message:

minor renaming

---
Diffs of the changes:  (+16 -16)

 AlphaInstrFormats.td |    2 +-
 AlphaInstrInfo.td    |   30 +++++++++++++++---------------
 2 files changed, 16 insertions(+), 16 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaInstrFormats.td
diff -u llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.24 llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.25
--- llvm/lib/Target/Alpha/AlphaInstrFormats.td:1.24	Wed Jan 25 21:22:07 2006
+++ llvm/lib/Target/Alpha/AlphaInstrFormats.td	Wed Jan 25 21:24:15 2006
@@ -90,7 +90,7 @@
   let Inst{20-0} = disp;
 }
 let isBranch = 1, isTerminator = 1 in
-class BFormDG<bits<6> opcode, string asmstr, list<dag> pattern> 
+class BForm<bits<6> opcode, string asmstr, list<dag> pattern> 
     : InstAlpha<opcode, (ops GPRC:$RA, target:$DISP), asmstr> {
   let Pattern = pattern;
 


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.108 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.109
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.108	Wed Jan 25 21:22:07 2006
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Wed Jan 25 21:24:15 2006
@@ -764,21 +764,21 @@
 def BR : BFormD<0x30, "br $$31,$DISP", [(br bb:$DISP)]>;
 
 //Branches, int
-def BEQ  : BFormDG<0x39, "beq $RA,$DISP", 
-                   [(brcond (seteq GPRC:$RA, 0), bb:$DISP)]>;
-def BGE  : BFormDG<0x3E, "bge $RA,$DISP", 
-                   [(brcond (setge GPRC:$RA, 0), bb:$DISP)]>;
-def BGT  : BFormDG<0x3F, "bgt $RA,$DISP",
-                   [(brcond (setgt GPRC:$RA, 0), bb:$DISP)]>;
-def BLBC : BFormDG<0x38, "blbc $RA,$DISP", []>; //TODO: Low bit clear
-def BLBS : BFormDG<0x3C, "blbs $RA,$DISP",
-                   [(brcond (and GPRC:$RA, 1), bb:$DISP)]>;
-def BLE  : BFormDG<0x3B, "ble $RA,$DISP",
-                   [(brcond (setle GPRC:$RA, 0), bb:$DISP)]>;
-def BLT  : BFormDG<0x3A, "blt $RA,$DISP",
-                   [(brcond (setlt GPRC:$RA, 0), bb:$DISP)]>;
-def BNE  : BFormDG<0x3D, "bne $RA,$DISP",
-                   [(brcond (setne GPRC:$RA, 0), bb:$DISP)]>;
+def BEQ  : BForm<0x39, "beq $RA,$DISP", 
+                 [(brcond (seteq GPRC:$RA, 0), bb:$DISP)]>;
+def BGE  : BForm<0x3E, "bge $RA,$DISP", 
+                 [(brcond (setge GPRC:$RA, 0), bb:$DISP)]>;
+def BGT  : BForm<0x3F, "bgt $RA,$DISP",
+                 [(brcond (setgt GPRC:$RA, 0), bb:$DISP)]>;
+def BLBC : BForm<0x38, "blbc $RA,$DISP", []>; //TODO: Low bit clear
+def BLBS : BForm<0x3C, "blbs $RA,$DISP",
+                 [(brcond (and GPRC:$RA, 1), bb:$DISP)]>;
+def BLE  : BForm<0x3B, "ble $RA,$DISP",
+                 [(brcond (setle GPRC:$RA, 0), bb:$DISP)]>;
+def BLT  : BForm<0x3A, "blt $RA,$DISP",
+                 [(brcond (setlt GPRC:$RA, 0), bb:$DISP)]>;
+def BNE  : BForm<0x3D, "bne $RA,$DISP",
+                 [(brcond (setne GPRC:$RA, 0), bb:$DISP)]>;
 
 //Branches, float
 def FBEQ : FBForm<0x31, "fbeq $RA,$DISP", 






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