[llvm-commits] CVS: llvm/utils/TableGen/CodeGenInstruction.h CodeGenTarget.cpp DAGISelEmitter.cpp

[Evan Cheng]

Changes in directory llvm/utils/TableGen:

CodeGenInstruction.h updated: 1.17 -> 1.18
CodeGenTarget.cpp updated: 1.51 -> 1.52
DAGISelEmitter.cpp updated: 1.116 -> 1.117
---
Log message:

Added field noResults to Instruction.
Currently tblgen cannot tell which operands in the operand list are results so
it assumes the first one is a result. This is bad. Ideally we would fix this
by separating results from inputs, e.g. (res R32:$dst),
(ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding
'let noResults = 1' is the workaround to tell tblgen that the instruction does
not produces a result. It works for now since tblgen does not support
instructions which produce multiple results.


---
Diffs of the changes:  (+3 -4)

 CodeGenInstruction.h |    1 +
 CodeGenTarget.cpp    |    1 +
 DAGISelEmitter.cpp   |    5 +----
 3 files changed, 3 insertions(+), 4 deletions(-)


Index: llvm/utils/TableGen/CodeGenInstruction.h
diff -u llvm/utils/TableGen/CodeGenInstruction.h:1.17 llvm/utils/TableGen/CodeGenInstruction.h:1.18
--- llvm/utils/TableGen/CodeGenInstruction.h:1.17	Fri Dec 23 16:11:47 2005
+++ llvm/utils/TableGen/CodeGenInstruction.h	Mon Dec 26 03:11:45 2005
@@ -87,6 +87,7 @@
     bool hasCtrlDep;
     bool hasInFlag;
     bool hasOutFlag;
+    bool noResults;
 
     CodeGenInstruction(Record *R, const std::string &AsmStr);
 


Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.51 llvm/utils/TableGen/CodeGenTarget.cpp:1.52
--- llvm/utils/TableGen/CodeGenTarget.cpp:1.51	Fri Dec 23 16:11:47 2005
+++ llvm/utils/TableGen/CodeGenTarget.cpp	Mon Dec 26 03:11:45 2005
@@ -273,6 +273,7 @@
   hasCtrlDep   = R->getValueAsBit("hasCtrlDep");
   hasInFlag    = R->getValueAsBit("hasInFlag");
   hasOutFlag   = R->getValueAsBit("hasOutFlag");
+  noResults    = R->getValueAsBit("noResults");
   hasVariableNumberOfOperands = false;
   
   DagInit *DI;


Index: llvm/utils/TableGen/DAGISelEmitter.cpp
diff -u llvm/utils/TableGen/DAGISelEmitter.cpp:1.116 llvm/utils/TableGen/DAGISelEmitter.cpp:1.117
--- llvm/utils/TableGen/DAGISelEmitter.cpp:1.116	Sat Dec 24 17:36:59 2005
+++ llvm/utils/TableGen/DAGISelEmitter.cpp	Mon Dec 26 03:11:45 2005
@@ -1097,11 +1097,8 @@
       CodeGenInstruction &InstInfo =Target.getInstruction(Instrs[i]->getName());
 
       if (InstInfo.OperandList.size() != 0) {
-        // It's possible for some instruction, e.g. RET for X86 that only has an
-        // implicit flag operand.
         // FIXME: temporary hack...
-        if (InstInfo.isReturn || InstInfo.isBranch || InstInfo.isCall ||
-            InstInfo.isStore) {
+        if (InstInfo.noResults) {
           // These produce no results
           for (unsigned j = 0, e = InstInfo.OperandList.size(); j < e; ++j)
             Operands.push_back(InstInfo.OperandList[j].Rec);