[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp

[Andrew Lenharth]

Changes in directory llvm/lib/Target/Alpha:

AlphaISelDAGToDAG.cpp updated: 1.16 -> 1.17
---
Log message:

restore a more restricted select

---
Diffs of the changes:  (+32 -0)

 AlphaISelDAGToDAG.cpp |   32 ++++++++++++++++++++++++++++++++
 1 files changed, 32 insertions(+)


Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.16 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.17
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.16	Sat Dec 10 21:54:31 2005
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp	Mon Dec 12 11:43:52 2005
@@ -401,6 +401,38 @@
     }
     break;
 
+  case ISD::SELECT:
+    if (MVT::isFloatingPoint(N->getValueType(0)) &&
+	(N->getOperand(0).getOpcode() != ISD::SETCC ||
+	 !MVT::isFloatingPoint(N->getOperand(0).getOperand(1).getValueType()))) {
+      //This should be the condition not covered by the Patterns
+      //FIXME: Don't have SelectCode die, but rather return something testable
+      // so that things like this can be caught in fall though code
+      //move int to fp
+      bool isDouble = N->getValueType(0) == MVT::f64;
+      SDOperand LD,
+	cond = Select(N->getOperand(0)),
+	TV = Select(N->getOperand(1)),
+	FV = Select(N->getOperand(2));
+      
+      if (AlphaLowering.hasITOF()) {
+	LD = CurDAG->getNode(AlphaISD::ITOFT_, MVT::f64, cond);
+      } else {
+	int FrameIdx =
+	  CurDAG->getMachineFunction().getFrameInfo()->CreateStackObject(8, 8);
+	SDOperand FI = CurDAG->getFrameIndex(FrameIdx, MVT::i64);
+	SDOperand ST = CurDAG->getTargetNode(Alpha::STQ, MVT::Other,
+					     cond, FI, CurDAG->getRegister(Alpha::R31, MVT::i64));
+	LD = CurDAG->getTargetNode(Alpha::LDT, MVT::f64, FI,
+				   CurDAG->getRegister(Alpha::R31, MVT::i64),
+				   ST);
+      }
+      SDOperand FP = CurDAG->getTargetNode(isDouble?Alpha::FCMOVEQT:Alpha::FCMOVEQS,
+					   MVT::f64, FV, TV, LD);
+      return FP;
+    }
+    break;
+
   }
 
   return SelectCode(Op);