[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp AlphaInstrInfo.td

Andrew Lenharth alenhar2 at cs.uiuc.edu
Mon Dec 5 12:51:05 PST 2005



Changes in directory llvm/lib/Target/Alpha:

AlphaISelDAGToDAG.cpp updated: 1.12 -> 1.13
AlphaInstrInfo.td updated: 1.76 -> 1.77
---
Log message:

move this over to the dag

---
Diffs of the changes:  (+9 -10)

 AlphaISelDAGToDAG.cpp |    8 --------
 AlphaInstrInfo.td     |   11 +++++++++--
 2 files changed, 9 insertions(+), 10 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.12 llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.13
--- llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp:1.12	Mon Dec  5 11:51:02 2005
+++ llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp	Mon Dec  5 14:50:53 2005
@@ -247,14 +247,6 @@
                                 CurDAG->getTargetExternalSymbol(cast<ExternalSymbolSDNode>(N)->getSymbol(), MVT::i64),
                                 getGlobalBaseReg());
 
-  case ISD::CALLSEQ_START:
-  case ISD::CALLSEQ_END: {
-    unsigned Amt = cast<ConstantSDNode>(N->getOperand(1))->getValue();
-    unsigned Opc = N->getOpcode() == ISD::CALLSEQ_START ?
-                       Alpha::ADJUSTSTACKDOWN : Alpha::ADJUSTSTACKUP;
-    return CurDAG->SelectNodeTo(N, Opc, MVT::Other,
-                                getI64Imm(Amt), Select(N->getOperand(0)));
-  }
   case ISD::RET: {
     SDOperand Chain = Select(N->getOperand(0));     // Token chain.
     SDOperand InFlag;


Index: llvm/lib/Target/Alpha/AlphaInstrInfo.td
diff -u llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.76 llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.77
--- llvm/lib/Target/Alpha/AlphaInstrInfo.td:1.76	Wed Nov 30 11:11:20 2005
+++ llvm/lib/Target/Alpha/AlphaInstrInfo.td	Mon Dec  5 14:50:53 2005
@@ -26,6 +26,11 @@
 def Alpha_cvtqs : SDNode<"AlphaISD::CVTQS_", SDTFPUnaryOpUnC, []>;
 def Alpha_cvttq : SDNode<"AlphaISD::CVTTQ_", SDTFPUnaryOp, []>;
 
+// These are target-independent nodes, but have target-specific formats.
+def SDT_AlphaCallSeq : SDTypeProfile<0, 1, [ SDTCisVT<0, i64> ]>;
+def callseq_start : SDNode<"ISD::CALLSEQ_START", SDT_AlphaCallSeq,[SDNPHasChain]>;
+def callseq_end   : SDNode<"ISD::CALLSEQ_END",   SDT_AlphaCallSeq,[SDNPHasChain]>;
+
 
 //********************
 //Paterns for matching
@@ -99,8 +104,10 @@
              [(set F8RC:$RA, (undef))]>;
 
 def WTF : PseudoInstAlpha<(ops variable_ops), "#wtf", []>;
-def ADJUSTSTACKUP : PseudoInstAlpha<(ops variable_ops), "ADJUP", []>;
-def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops variable_ops), "ADJDOWN", []>;
+def ADJUSTSTACKUP : PseudoInstAlpha<(ops s64imm:$amt), "ADJUP", 
+                [(callseq_start imm:$amt)]>;
+def ADJUSTSTACKDOWN : PseudoInstAlpha<(ops s64imm:$amt), "ADJDOWN", 
+                [(callseq_end imm:$amt)]>;
 def ALTENT : PseudoInstAlpha<(ops s64imm:$TARGET), "$TARGET:\n", []>;
 def PCLABEL : PseudoInstAlpha<(ops s64imm:$num), "PCMARKER_$num:\n",[]>;
 def MEMLABEL : PseudoInstAlpha<(ops s64imm:$i, s64imm:$j, s64imm:$k, s64imm:$m),






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