[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

[Nate Begeman]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

ScheduleDAG.cpp updated: 1.46 -> 1.47
---
Log message:

Support multiple ValueTypes per RegisterClass, needed for upcoming vector
work.  This change has no effect on generated code.


---
Diffs of the changes:  (+1 -1)

 ScheduleDAG.cpp |    2 +-
 1 files changed, 1 insertion(+), 1 deletion(-)


Index: llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.46 llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.47
--- llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp:1.46	Tue Nov 29 20:04:11 2005
+++ llvm/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp	Wed Nov 30 22:51:06 2005
@@ -1208,7 +1208,7 @@
         // Pick the register class of the right type that contains this physreg.
         for (MRegisterInfo::regclass_iterator I = MRI.regclass_begin(),
              E = MRI.regclass_end(); I != E; ++I)
-          if ((*I)->getType() == Node->getValueType(0) &&
+          if ((*I)->hasType(Node->getValueType(0)) &&
               (*I)->contains(SrcReg)) {
             TRC = *I;
             break;