[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPCISelLowering.cpp

[Nate Begeman]

Changes in directory llvm/lib/Target/PowerPC:

PPCISelLowering.cpp updated: 1.46 -> 1.47
---
Log message:

Hook up one type, v4f32, to the VR RegisterClass for now.


---
Diffs of the changes:  (+6 -0)

 PPCISelLowering.cpp |    6 ++++++
 1 files changed, 6 insertions(+)


Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp
diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.46 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.47
--- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.46	Tue Nov 29 00:16:21 2005
+++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp	Tue Nov 29 02:17:20 2005
@@ -121,6 +121,12 @@
     setOperationAction(ISD::SRA, MVT::i64, Custom);
   }
   
+  if (TM.getSubtarget<PPCSubtarget>().hasAltivec()) {
+    // FIXME: AltiVec supports a wide variety of packed types.  For now, we're
+    // bringing up support with just v4f32.
+    addRegisterClass(MVT::v4f32, PPC::VRRCRegisterClass);
+  }
+  
   setSetCCResultContents(ZeroOrOneSetCCResult);
   
   computeRegisterProperties();