[llvm-commits] CVS: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp

[Duraid Madina]

Changes in directory llvm/lib/Target/IA64:

IA64ISelDAGToDAG.cpp updated: 1.6 -> 1.7
---
Log message:

add support for loading bools



---
Diffs of the changes:  (+7 -1)

 IA64ISelDAGToDAG.cpp |    8 +++++++-
 1 files changed, 7 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp
diff -u llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.6 llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.7
--- llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp:1.6	Wed Nov  2 01:32:59 2005
+++ llvm/lib/Target/IA64/IA64ISelDAGToDAG.cpp	Fri Nov  4 03:59:06 2005
@@ -369,7 +369,13 @@
     unsigned Opc;
     switch (TypeBeingLoaded) {
     default: N->dump(); assert(0 && "Cannot load this type!");
-    // FIXME: bools? case MVT::i1:
+    case MVT::i1: { // this is a bool
+      Opc = IA64::LD1; // first we load a byte, then compare for != 0
+      CurDAG->SelectNodeTo(N, IA64::CMPNE, MVT::i1, MVT::Other, 
+	CurDAG->getTargetNode(Opc, MVT::i64, Address),
+	CurDAG->getRegister(IA64::r0, MVT::i64), Chain);
+      return SDOperand(N, Op.ResNo); // XXX: early exit
+      }
     case MVT::i8:  Opc = IA64::LD1; break;
     case MVT::i16: Opc = IA64::LD2; break;
     case MVT::i32: Opc = IA64::LD4; break;