[llvm-commits] CVS: llvm/utils/TableGen/RegisterInfoEmitter.cpp

[Chris Lattner]

Changes in directory llvm/utils/TableGen:

RegisterInfoEmitter.cpp updated: 1.32 -> 1.33
---
Log message:

trim down the target info structs now that we have a preferred spill register class for each callee save register


---
Diffs of the changes:  (+2 -17)

 RegisterInfoEmitter.cpp |   19 ++-----------------
 1 files changed, 2 insertions(+), 17 deletions(-)


Index: llvm/utils/TableGen/RegisterInfoEmitter.cpp
diff -u llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.32 llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.33
--- llvm/utils/TableGen/RegisterInfoEmitter.cpp:1.32	Fri Sep 30 01:44:45 2005
+++ llvm/utils/TableGen/RegisterInfoEmitter.cpp	Fri Sep 30 12:34:49 2005
@@ -214,24 +214,9 @@
       OS << Reg.getName();
     OS << "\",\t";
     if (RegisterAliases.count(Reg.TheDef))
-      OS << Reg.getName() << "_AliasSet,\t";
+      OS << Reg.getName() << "_AliasSet },\n";
     else
-      OS << "Empty_AliasSet,\t";
-
-    // Figure out what the size and alignment of the spill slots are for this
-    // reg.  This may be explicitly declared in the register, or it may be
-    // inferred from the register classes it is part of.
-    std::multimap<Record*, const CodeGenRegisterClass*>::iterator I, E;
-    tie(I, E) = RegClassesBelongedTo.equal_range(Reg.TheDef);
-    unsigned SpillSize = Reg.DeclaredSpillSize;
-    unsigned SpillAlign = Reg.DeclaredSpillAlignment;
-    for (; I != E; ++I) {   // For each reg class this belongs to.
-      const CodeGenRegisterClass *RC = I->second;
-      SpillSize = std::max(SpillSize, RC->SpillSize);
-      SpillAlign = std::max(SpillAlign, RC->SpillAlignment);
-    }
-
-    OS << SpillSize << ", " << SpillAlign << " },\n";
+      OS << "Empty_AliasSet },\n";
   }
   OS << "  };\n";      // End of register descriptors...
   OS << "}\n\n";       // End of anonymous namespace...