[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

LegalizeDAG.cpp updated: 1.167 -> 1.168
---
Log message:

When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
the old condition to a one bit value.  The incoming value must have been
promoted, and the top bits are undefined.  This causes us to generate:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r3, 17
        cmpwi cr0, r2, 0
        bne .LBB_test_2 ; 
.LBB_test_1:    ; 
        li r3, 1
.LBB_test_2:    ; 
        blr

instead of:

_test:
        rlwinm r2, r3, 0, 31, 31
        li r2, 17
        cmpwi cr0, r3, 0
        bne .LBB_test_2 ; 
.LBB_test_1:    ; 
        li r2, 1
.LBB_test_2:    ; 
        or r3, r2, r2
        blr

for:

int %test(bool %c) {
        %retval = select bool %c, int 17, int 1 
        ret int %retval
}



---
Diffs of the changes:  (+7 -0)

 LegalizeDAG.cpp |    7 +++++++
 1 files changed, 7 insertions(+)


Index: llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.167 llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.168
--- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp:1.167	Wed Aug 17 14:27:23 2005
+++ llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp	Sun Aug 21 13:03:09 2005
@@ -681,6 +681,10 @@
                              Tmp2.getOperand(0), Tmp2.getOperand(1),
                              Node->getOperand(2));
       } else {
+        // Make sure the condition is either zero or one.  It may have been
+        // promoted from something else.
+        Tmp2 = DAG.getZeroExtendInReg(Tmp2, MVT::i1);
+        
         Result = DAG.getNode(ISD::BR_CC, MVT::Other, Tmp1, 
                              DAG.getCondCode(ISD::SETNE), Tmp2,
                              DAG.getConstant(0, Tmp2.getValueType()),
@@ -1072,6 +1076,9 @@
                               Tmp2, Tmp3,
                               cast<CondCodeSDNode>(Tmp1.getOperand(2))->get());
       } else {
+        // Make sure the condition is either zero or one.  It may have been
+        // promoted from something else.
+        Tmp1 = DAG.getZeroExtendInReg(Tmp1, MVT::i1);
         Result = DAG.getSelectCC(Tmp1, 
                                  DAG.getConstant(0, Tmp1.getValueType()),
                                  Tmp2, Tmp3, ISD::SETNE);