[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp

Chris Lattner lattner at cs.uiuc.edu
Wed Aug 10 11:11:44 PDT 2005



Changes in directory llvm/lib/Target/PowerPC:

PPC32ISelPattern.cpp updated: 1.130 -> 1.131
---
Log message:

Changes for PPC32ISelPattern.cpp
1. Clean up how SelectIntImmediateExpr handles use counts.
2. "Subtract from" was not clearing hi 16 bits.

Patch by Jim Laskey



---
Diffs of the changes:  (+22 -24)

 PPC32ISelPattern.cpp |   46 ++++++++++++++++++++++------------------------
 1 files changed, 22 insertions(+), 24 deletions(-)


Index: llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
diff -u llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.130 llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.131
--- llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp:1.130	Wed Aug 10 11:35:46 2005
+++ llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp	Wed Aug 10 13:11:33 2005
@@ -569,9 +569,9 @@
   unsigned FoldIfWideZeroExtend(SDOperand N);
   unsigned SelectCC(SDOperand CC, unsigned &Opc, bool &Inv, unsigned &Idx);
   unsigned SelectCCExpr(SDOperand N, unsigned& Opc, bool &Inv, unsigned &Idx);
-  bool SelectIntImmediateExpr(SDOperand N, unsigned Result, unsigned C,
+  bool SelectIntImmediateExpr(SDOperand N, unsigned Result,
                               unsigned OCHi, unsigned OCLo,
-                              bool IsArithmetic);
+                              bool IsArithmetic = false, bool Negate = false);
   unsigned SelectExpr(SDOperand N, bool Recording=false);
   void Select(SDOperand N);
 
@@ -1279,11 +1279,17 @@
 }
 
 // SelectIntImmediateExpr - Choose code for opcodes with immediate value.
-// Note: immediate constant must be second operand so that the use count can be
-// determined.
-bool ISel::SelectIntImmediateExpr(SDOperand N, unsigned Result, unsigned C,
+bool ISel::SelectIntImmediateExpr(SDOperand N, unsigned Result,
                                   unsigned OCHi, unsigned OCLo,
-                                  bool IsArithmetic) {
+                                  bool IsArithmetic, bool Negate) {
+  // check constant
+  ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1));
+  // exit if not a constant
+  if (!CN) return false;
+  // extract immediate
+  unsigned C = (unsigned)CN->getSignExtended();
+  // negate if required (ISD::SUB)
+  if (Negate) C = -C;
   // get the hi and lo portions of constant
   unsigned Hi = IsArithmetic ? HA16(C) : Hi16(C);
   unsigned Lo = Lo16(C);
@@ -1293,8 +1299,7 @@
   if (Hi && Lo) {
     // exit if usage indicates it would be better to load immediate into a 
     // register
-    if (dyn_cast<ConstantSDNode>(N.getOperand(1))->use_size() > 2) 
-      return false;
+    if (CN->use_size() > 2) return false;
     // need intermediate result for two instructions
     Tmp = MakeReg(MVT::i32);
   }
@@ -1678,11 +1683,8 @@
       BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);
       return Result;
     }
-    if (isIntImmediate(N.getOperand(1), Tmp2)) {
-      if (SelectIntImmediateExpr(N, Result, Tmp2, PPC::ADDIS, PPC::ADDI, true))
-        return Result;
-    }
-    
+    if (SelectIntImmediateExpr(N, Result, PPC::ADDIS, PPC::ADDI, true))
+      return Result;
     Tmp1 = SelectExpr(N.getOperand(0));
     Tmp2 = SelectExpr(N.getOperand(1));
     BuildMI(BB, PPC::ADD, 2, Result).addReg(Tmp1).addReg(Tmp2);
@@ -1738,10 +1740,8 @@
   case ISD::OR:
     if (SelectBitfieldInsert(N, Result))
       return Result;
-    if (isIntImmediate(N.getOperand(1), Tmp2)) {
-      if (SelectIntImmediateExpr(N, Result, Tmp2, PPC::ORIS, PPC::ORI, false))
-        return Result;
-    }
+    if (SelectIntImmediateExpr(N, Result, PPC::ORIS, PPC::ORI))
+      return Result;
     // emit regular or
     Tmp1 = SelectExpr(N.getOperand(0));
     Tmp2 = SelectExpr(N.getOperand(1));
@@ -1783,10 +1783,8 @@
       }
       return Result;
     }
-    if (isIntImmediate(N.getOperand(1), Tmp2)) {
-      if (SelectIntImmediateExpr(N, Result, Tmp2, PPC::XORIS, PPC::XORI, false))
-        return Result;
-    }
+    if (SelectIntImmediateExpr(N, Result, PPC::XORIS, PPC::XORI))
+      return Result;
     // emit regular xor
     Tmp1 = SelectExpr(N.getOperand(0));
     Tmp2 = SelectExpr(N.getOperand(1));
@@ -1823,13 +1821,13 @@
       return Result;
     }
     if (isIntImmediate(N.getOperand(0), Tmp1) && isInt16(Tmp1)) {
+      Tmp1 = Lo16(Tmp1);
       Tmp2 = SelectExpr(N.getOperand(1));
       BuildMI(BB, PPC::SUBFIC, 2, Result).addReg(Tmp2).addSImm(Tmp1);
       return Result;
-    } else if (isIntImmediate(N.getOperand(1), Tmp2)) {
-      if (SelectIntImmediateExpr(N, Result, -Tmp2, PPC::ADDIS, PPC::ADDI, true))
+    }
+    if (SelectIntImmediateExpr(N, Result, PPC::ADDIS, PPC::ADDI, true, true))
         return Result;
-    }    
     Tmp1 = SelectExpr(N.getOperand(0));
     Tmp2 = SelectExpr(N.getOperand(1));
     BuildMI(BB, PPC::SUBF, 2, Result).addReg(Tmp2).addReg(Tmp1);






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