[llvm-commits] CVS: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/SelectionDAG:

SelectionDAG.cpp updated: 1.132 -> 1.133
---
Log message:

Fix an oversight that may be causing PR617: http://llvm.cs.uiuc.edu/PR617 .


---
Diffs of the changes:  (+13 -4)

 SelectionDAG.cpp |   17 +++++++++++++----
 1 files changed, 13 insertions(+), 4 deletions(-)


Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
diff -u llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.132 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.133
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:1.132	Tue Aug  9 18:09:05 2005
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp	Wed Aug 10 12:37:53 2005
@@ -626,12 +626,21 @@
     if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB ||
         N2.getOpcode() == ISD::XOR) {
       // Simplify  X == (X+Z) -->  Z == 0
-      if (N2.getOperand(0) == N1)
+      if (N2.getOperand(0) == N1) {
         return getSetCC(VT, N2.getOperand(1),
                         getConstant(0, N2.getValueType()), Cond);
-      else if (N2.getOperand(1) == N1)
-        return getSetCC(VT, N2.getOperand(0), getConstant(0, N2.getValueType()),
-                        Cond);
+      } else if (N2.getOperand(1) == N1) {
+        if (isCommutativeBinOp(N2.getOpcode())) {
+          return getSetCC(VT, N2.getOperand(0),
+                          getConstant(0, N2.getValueType()), Cond);
+        } else {
+          assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!");
+          // X == (Z-X)  --> X<<1 == Z
+          return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1, 
+                                      getConstant(1, TLI.getShiftAmountTy())),
+                          N2.getOperand(0), Cond);
+        }
+      }
     }
   }