[llvm-commits] CVS: llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/PowerPC:

PPC64ISelPattern.cpp updated: 1.17 -> 1.18
---
Log message:

Realize that we don't support fmod directly, fixing CodeGen/Generic/print-arith-fp.ll



---
Diffs of the changes:  (+3 -1)

 PPC64ISelPattern.cpp |    4 +++-
 1 files changed, 3 insertions(+), 1 deletion(-)


Index: llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
diff -u llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp:1.17 llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp:1.18
--- llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp:1.17	Thu May 12 18:23:53 2005
+++ llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp	Fri May 13 11:20:22 2005
@@ -55,13 +55,15 @@
       setOperationAction(ISD::MEMSET, MVT::Other, Expand);
       setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
 
-      // We don't support sin/cos/sqrt
+      // We don't support sin/cos/sqrt/fmod
       setOperationAction(ISD::FSIN , MVT::f64, Expand);
       setOperationAction(ISD::FCOS , MVT::f64, Expand);
       setOperationAction(ISD::FSQRT, MVT::f64, Expand);
+      setOperationAction(ISD::SREM , MVT::f64, Expand);
       setOperationAction(ISD::FSIN , MVT::f32, Expand);
       setOperationAction(ISD::FCOS , MVT::f32, Expand);
       setOperationAction(ISD::FSQRT, MVT::f32, Expand);
+      setOperationAction(ISD::SREM , MVT::f32, Expand);
 
       // PPC 64 has i16 and i32 but no i8 (or i1) SEXTLOAD
       setOperationAction(ISD::SEXTLOAD, MVT::i1, Expand);