[llvm-commits] CVS: llvm/lib/Target/Alpha/AlphaISelPattern.cpp

Andrew Lenharth alenhar2 at cs.uiuc.edu
Thu Apr 7 11:15:41 PDT 2005



Changes in directory llvm/lib/Target/Alpha:

AlphaISelPattern.cpp updated: 1.87 -> 1.88
---
Log message:

fix a small optimization opertunity and make gcc happy

---
Diffs of the changes:  (+1 -3)

 AlphaISelPattern.cpp |    4 +---
 1 files changed, 1 insertion(+), 3 deletions(-)


Index: llvm/lib/Target/Alpha/AlphaISelPattern.cpp
diff -u llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.87 llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.88
--- llvm/lib/Target/Alpha/AlphaISelPattern.cpp:1.87	Thu Apr  7 12:19:16 2005
+++ llvm/lib/Target/Alpha/AlphaISelPattern.cpp	Thu Apr  7 13:15:28 2005
@@ -1090,7 +1090,7 @@
 
 unsigned ISel::SelectExpr(SDOperand N) {
   unsigned Result;
-  unsigned Tmp1, Tmp2, Tmp3;
+  unsigned Tmp1, Tmp2 = 0, Tmp3;
   unsigned Opc = 0;
   unsigned opcode = N.getOpcode();
 
@@ -1448,7 +1448,6 @@
                 Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
 
               Tmp1 = SelectExpr(N.getOperand(0).getOperand(0));
-              Tmp2 = SelectExpr(N.getOperand(0).getOperand(1));
               BuildMI(BB, Opc, 2, Result).addReg(Tmp1).addReg(Tmp2);
             }
             return Result;
@@ -1810,7 +1809,6 @@
       {
         unsigned k = ExactLog2(abs(CSD->getSignExtended()));
         Tmp1 = SelectExpr(N.getOperand(0));
-        Tmp2 = MakeReg(MVT::i64);
         if (k == 1)
           Tmp2 = Tmp1;
         else






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