[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td X86InstrInfo.cpp X86InstrInfo.h

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86InstrInfo.td updated: 1.115 -> 1.116
X86InstrInfo.cpp updated: 1.34 -> 1.35
X86InstrInfo.h updated: 1.44 -> 1.45
---
Log message:

Teach the code generator that shrd/shld is commutable if it has an immediate.
This allows us to generate this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %EDX, DWORD PTR [%ESP + 8]
        shld %EDX, %EDX, 2
        shl %EAX, 2
        ret

instead of this:

foo:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, DWORD PTR [%ESP + 8]
        mov %EDX, %EAX
        shrd %EDX, %ECX, 30
        shl %EAX, 2
        ret

Note the magically transmogrifying immediate.



---
Diffs of the changes:  (+29 -0)

Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.115 llvm/lib/Target/X86/X86InstrInfo.td:1.116
--- llvm/lib/Target/X86/X86InstrInfo.td:1.115	Mon Jan 10 16:09:33 2005
+++ llvm/lib/Target/X86/X86InstrInfo.td	Wed Jan 19 01:11:01 2005
@@ -881,12 +881,15 @@
 def SHRD32rrCL : I<0xAD, MRMDestReg, (ops R32:$dst, R32:$src1, R32:$src2),
                    "shrd{l} {%cl, $src2, $dst|$dst, $src2, %CL}">,
                    Imp<[CL],[]>, TB;
+
+let isCommutable = 1 in {  // These instructions commute to each other.
 def SHLD32rri8 : Ii8<0xA4, MRMDestReg,
                      (ops R32:$dst, R32:$src1, R32:$src2, i8imm:$src3),
                      "shld{l} {$src3, $src2, $dst|$dst, $src2, $src3}">, TB;
 def SHRD32rri8 : Ii8<0xAC, MRMDestReg,
                      (ops R32:$dst, R32:$src1, R32:$src2, i8imm:$src3),
                      "shrd{l} {$src3, $src2, $dst|$dst, $src2, $src3}">, TB;
+}
 
 let isTwoAddress = 0 in {
   def SHLD32mrCL : I<0xA5, MRMDestMem, (ops i32mem:$dst, R32:$src2),


Index: llvm/lib/Target/X86/X86InstrInfo.cpp
diff -u llvm/lib/Target/X86/X86InstrInfo.cpp:1.34 llvm/lib/Target/X86/X86InstrInfo.cpp:1.35
--- llvm/lib/Target/X86/X86InstrInfo.cpp:1.34	Sat Jan  1 22:18:17 2005
+++ llvm/lib/Target/X86/X86InstrInfo.cpp	Wed Jan 19 01:11:01 2005
@@ -121,6 +121,26 @@
   return 0;
 }
 
+/// commuteInstruction - We have a few instructions that must be hacked on to
+/// commute them.
+///
+MachineInstr *X86InstrInfo::commuteInstruction(MachineInstr *MI) const {
+  switch (MI->getOpcode()) {
+  case X86::SHRD32rri8: // A = SHRD32rri8 B, C, I -> A = SHLD32rri8 C, B, (32-I)
+  case X86::SHLD32rri8:{// A = SHLD32rri8 B, C, I -> A = SHRD32rri8 C, B, (32-I)
+    unsigned Amt = MI->getOperand(3).getImmedValue();
+    unsigned A = MI->getOperand(0).getReg();
+    unsigned B = MI->getOperand(1).getReg();
+    unsigned C = MI->getOperand(2).getReg();
+    unsigned Opc = X86::SHRD32rri8;
+    if (MI->getOpcode() == X86::SHRD32rri8) Opc = X86::SHLD32rri8;
+    return BuildMI(Opc, 3, A).addReg(B).addReg(C).addImm(32-Amt);
+  }
+  default:
+    return TargetInstrInfo::commuteInstruction(MI);
+  }
+}
+
 
 void X86InstrInfo::insertGoto(MachineBasicBlock& MBB,
                               MachineBasicBlock& TMBB) const {


Index: llvm/lib/Target/X86/X86InstrInfo.h
diff -u llvm/lib/Target/X86/X86InstrInfo.h:1.44 llvm/lib/Target/X86/X86InstrInfo.h:1.45
--- llvm/lib/Target/X86/X86InstrInfo.h:1.44	Sat Jan  1 20:37:07 2005
+++ llvm/lib/Target/X86/X86InstrInfo.h	Wed Jan 19 01:11:01 2005
@@ -191,6 +191,12 @@
   ///
   virtual MachineInstr *convertToThreeAddress(MachineInstr *TA) const;
 
+  /// commuteInstruction - We have a few instructions that must be hacked on to
+  /// commute them.
+  ///
+  virtual MachineInstr *commuteInstruction(MachineInstr *MI) const;
+
+
   /// Insert a goto (unconditional branch) sequence to TMBB, at the
   /// end of MBB
   virtual void insertGoto(MachineBasicBlock& MBB,