[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelPattern.cpp

Chris Lattner lattner at cs.uiuc.edu
Mon Jan 17 20:18:47 PST 2005



Changes in directory llvm/lib/Target/X86:

X86ISelPattern.cpp updated: 1.71 -> 1.72
---
Log message:

Do not emit loads multiple times, potentially in the wrong places.


---
Diffs of the changes:  (+2 -2)

Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.71 llvm/lib/Target/X86/X86ISelPattern.cpp:1.72
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.71	Mon Jan 17 22:00:54 2005
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Mon Jan 17 22:18:32 2005
@@ -573,7 +573,7 @@
           // Okay, we know that we have a scale by now.  However, if the scaled
           // value is an add of something and a constant, we can fold the
           // constant into the disp field here.
-          if (ShVal.Val->getOpcode() == ISD::ADD && !ExprMap.count(ShVal) &&
+          if (ShVal.Val->getOpcode() == ISD::ADD && ShVal.hasOneUse() &&
               isa<ConstantSDNode>(ShVal.Val->getOperand(1))) {
             AM.IndexReg = ShVal.Val->getOperand(0);
             ConstantSDNode *AddVal =
@@ -604,7 +604,7 @@
           // Okay, we know that we have a scale by now.  However, if the scaled
           // value is an add of something and a constant, we can fold the
           // constant into the disp field here.
-          if (MulVal.Val->getOpcode() == ISD::ADD && !ExprMap.count(MulVal) &&
+          if (MulVal.Val->getOpcode() == ISD::ADD && MulVal.hasOneUse() &&
               isa<ConstantSDNode>(MulVal.Val->getOperand(1))) {
             Reg = MulVal.Val->getOperand(0);
             ConstantSDNode *AddVal =






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