[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelPattern.cpp

Chris Lattner lattner at cs.uiuc.edu
Mon Jan 10 22:36:35 PST 2005



Changes in directory llvm/lib/Target/X86:

X86ISelPattern.cpp updated: 1.31 -> 1.32
---
Log message:

Instead of generating stuff like this:

        mov %ECX, %EAX
        add %ECX, 32768
        mov %SI, WORD PTR [2*%ECX + l13_prev]

Generate this:

        mov %SI, WORD PTR [2*%ECX + l13_prev + 65536]

This occurs when you have a GEP instruction where an index is 
"something + imm".




---
Diffs of the changes:  (+14 -1)

Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.31 llvm/lib/Target/X86/X86ISelPattern.cpp:1.32
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.31	Tue Jan 11 00:19:26 2005
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Tue Jan 11 00:36:20 2005
@@ -429,7 +429,20 @@
         unsigned Val = CN->getValue();
         if (Val == 1 || Val == 2 || Val == 3) {
           AM.Scale = 1 << Val;
-          AM.IndexReg = SelectExpr(N.Val->getOperand(0));
+          SDOperand ShVal = N.Val->getOperand(0);
+
+          // Okay, we know that we have a scale by now.  However, if the scaled
+          // value is an add of something and a constant, we can fold the
+          // constant into the disp field here.
+          if (ShVal.Val->getOpcode() == ISD::ADD &&
+              isa<ConstantSDNode>(ShVal.Val->getOperand(1))) {
+            AM.IndexReg = SelectExpr(ShVal.Val->getOperand(0));
+            ConstantSDNode *AddVal =
+              cast<ConstantSDNode>(ShVal.Val->getOperand(1));
+            AM.Disp += AddVal->getValue() << Val;
+          } else {          
+            AM.IndexReg = SelectExpr(ShVal);
+          }
           return false;
         }
       }






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