[llvm-commits] CVS: llvm/lib/Target/X86/X86ISelPattern.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86ISelPattern.cpp updated: 1.26 -> 1.27
---
Log message:

Emit NOT instructions.


---
Diffs of the changes:  (+14 -1)

Index: llvm/lib/Target/X86/X86ISelPattern.cpp
diff -u llvm/lib/Target/X86/X86ISelPattern.cpp:1.26 llvm/lib/Target/X86/X86ISelPattern.cpp:1.27
--- llvm/lib/Target/X86/X86ISelPattern.cpp:1.26	Mon Jan 10 22:06:27 2005
+++ llvm/lib/Target/X86/X86ISelPattern.cpp	Mon Jan 10 22:31:30 2005
@@ -1382,8 +1382,21 @@
   case ISD::XOR:
     if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N.getOperand(1))) {
       Tmp1 = SelectExpr(N.getOperand(0));
+
+      if (CN->isAllOnesValue()) {
+        switch (N.getValueType()) {
+        default: assert(0 && "Cannot add this type!");
+        case MVT::i1:
+        case MVT::i8:  Opc = X86::NOT8r;  break;
+        case MVT::i16: Opc = X86::NOT16r; break;
+        case MVT::i32: Opc = X86::NOT32r; break;
+        }
+        BuildMI(BB, Opc, 1, Result).addReg(Tmp1);
+        return Result;
+      }
+
       switch (N.getValueType()) {
-      default: assert(0 && "Cannot add this type!");
+      default: assert(0 && "Cannot xor this type!");
       case MVT::i1:
       case MVT::i8:  Opc = X86::XOR8ri;  break;
       case MVT::i16: Opc = X86::XOR16ri; break;