[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPCInstrInfo.td

Misha Brukman brukman at cs.uiuc.edu
Sat Oct 23 13:29:35 PDT 2004



Changes in directory llvm/lib/Target/PowerPC:

PowerPCInstrInfo.td updated: 1.40 -> 1.41
---
Log message:

Add BA, BL, and BLA opcodes


---
Diffs of the changes:  (+4 -1)

Index: llvm/lib/Target/PowerPC/PowerPCInstrInfo.td
diff -u llvm/lib/Target/PowerPC/PowerPCInstrInfo.td:1.40 llvm/lib/Target/PowerPC/PowerPCInstrInfo.td:1.41
--- llvm/lib/Target/PowerPC/PowerPCInstrInfo.td:1.40	Sat Oct 23 01:05:49 2004
+++ llvm/lib/Target/PowerPC/PowerPCInstrInfo.td	Sat Oct 23 15:29:24 2004
@@ -53,7 +53,10 @@
 
 let isBranch = 1, isTerminator = 1 in {
   def COND_BRANCH : Pseudo<(ops), "; COND_BRANCH">;
-  def B : IForm<18, 0, 0, 0, 0, (ops target:$func), "b $func">;
+  def B   : IForm<18, 0, 0, 0, 0, (ops target:$func), "b $func">;
+  def BA  : IForm<18, 1, 0, 0, 0, (ops target:$func), "ba $func">;
+  def BL  : IForm<18, 0, 1, 0, 0, (ops target:$func), "bl $func">;
+  def BLA : IForm<18, 1, 1, 0, 0, (ops target:$func), "bla $func">;
   // FIXME: 4*CR# needs to be added to the BI field!
   // This will only work for CR0 as it stands now
   def BLT : BForm_ext<16, 0, 0, 12, 0, 0, 0, (ops CRRC:$crS, target:$block),






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