[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPC.td PPC32.td PPC64.td

[Misha Brukman]

Changes in directory llvm/lib/Target/PowerPC:

PowerPC.td updated: 1.9 -> 1.10
PPC32.td updated: 1.1 -> 1.2
PPC64.td updated: 1.2 -> 1.3
---
Log message:

PowerPC instruction definitions use LittleEndian-style encoding [0..31]


---
Diffs of the changes:  (+6 -0)

Index: llvm/lib/Target/PowerPC/PowerPC.td
diff -u llvm/lib/Target/PowerPC/PowerPC.td:1.9 llvm/lib/Target/PowerPC/PowerPC.td:1.10
--- llvm/lib/Target/PowerPC/PowerPC.td:1.9	Sat Sep  4 21:42:44 2004
+++ llvm/lib/Target/PowerPC/PowerPC.td	Thu Oct 14 00:54:38 2004
@@ -27,6 +27,8 @@
   let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", 
                        "Arg3Type", "Arg4Type", "VMX", "PPC64"];
   let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+
+  let isLittleEndianEncoding = 1;
 }
 
 def PowerPC : Target {


Index: llvm/lib/Target/PowerPC/PPC32.td
diff -u llvm/lib/Target/PowerPC/PPC32.td:1.1 llvm/lib/Target/PowerPC/PPC32.td:1.2
--- llvm/lib/Target/PowerPC/PPC32.td:1.1	Mon Aug 16 23:55:41 2004
+++ llvm/lib/Target/PowerPC/PPC32.td	Thu Oct 14 00:54:38 2004
@@ -27,6 +27,8 @@
   let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", 
                        "Arg3Type", "Arg4Type", "VMX", "PPC64"];
   let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+
+  let isLittleEndianEncoding = 1;
 }
 
 def PPC32 : Target {


Index: llvm/lib/Target/PowerPC/PPC64.td
diff -u llvm/lib/Target/PowerPC/PPC64.td:1.2 llvm/lib/Target/PowerPC/PPC64.td:1.3
--- llvm/lib/Target/PowerPC/PPC64.td:1.2	Thu Aug 19 14:36:57 2004
+++ llvm/lib/Target/PowerPC/PPC64.td	Thu Oct 14 00:54:38 2004
@@ -27,6 +27,8 @@
   let TSFlagsFields = ["ArgCount", "Arg0Type", "Arg1Type", "Arg2Type", 
                        "Arg3Type", "Arg4Type", "VMX", "PPC64"];
   let TSFlagsShifts = [ 0, 3, 8, 13, 18, 23, 28, 29 ];
+
+  let isLittleEndianEncoding = 1;
 }
 
 def PPC64 : Target {