[llvm-commits] CVS: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp VirtRegMap.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen:

LiveIntervalAnalysis.cpp updated: 1.127 -> 1.128
VirtRegMap.cpp updated: 1.24 -> 1.25
---
Log message:

There is no need to call MachineInstr::print directly, just send the MI& to an ostream.


---
Diffs of the changes:  (+18 -18)

Index: llvm/lib/CodeGen/LiveIntervalAnalysis.cpp
diff -u llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.127 llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.128
--- llvm/lib/CodeGen/LiveIntervalAnalysis.cpp:1.127	Thu Sep 30 10:59:17 2004
+++ llvm/lib/CodeGen/LiveIntervalAnalysis.cpp	Thu Sep 30 11:10:45 2004
@@ -180,8 +180,7 @@
     O << ((Value*)mbbi->getBasicBlock())->getName() << ":\n";
     for (MachineBasicBlock::iterator mii = mbbi->begin(),
            mie = mbbi->end(); mii != mie; ++mii) {
-      O << getInstructionIndex(mii) << '\t';
-      mii->print(O, tm_);
+      O << getInstructionIndex(mii) << '\t' << *mii;
     }
   }
 }
@@ -219,6 +218,9 @@
       for (unsigned i = 0; i != mi->getNumOperands(); ++i) {
         MachineOperand& mop = mi->getOperand(i);
         if (mop.isRegister() && mop.getReg() == li.reg) {
+          // First thing, attempt to fold the memory reference into the
+          // instruction.  If we can do this, we don't need to insert spill
+          // code.
           if (MachineInstr* fmi = mri_->foldMemoryOperand(mi, i, slot)) {
             if (lv_)
               lv_->instructionChanged(mi, fmi);
@@ -226,12 +228,14 @@
             mi2iMap_.erase(mi);
             i2miMap_[index/InstrSlots::NUM] = fmi;
             mi2iMap_[fmi] = index;
-            MachineBasicBlock& mbb = *mi->getParent();
-            mi = mbb.insert(mbb.erase(mi), fmi);
+            MachineBasicBlock &MBB = *mi->getParent();
+            mi = MBB.insert(MBB.erase(mi), fmi);
             ++numFolded;
+
+            // Folding the load/store can completely change the instruction in
+            // unpredictable ways, rescan it from the beginning.
             goto for_operand;
-          }
-          else {
+          } else {
             // This is tricky. We need to add information in the interval about
             // the spill code so we have to use our extra load/store slots.
             //
@@ -519,8 +523,7 @@
          mi != miEnd; ++mi) {
       const TargetInstrDescriptor& tid =
         tm_->getInstrInfo()->get(mi->getOpcode());
-      DEBUG(std::cerr << getInstructionIndex(mi) << "\t";
-            mi->print(std::cerr, tm_));
+      DEBUG(std::cerr << getInstructionIndex(mi) << "\t" << *mi);
 
       // handle implicit defs
       for (const unsigned* id = tid.ImplicitDefs; *id; ++id)


Index: llvm/lib/CodeGen/VirtRegMap.cpp
diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.24 llvm/lib/CodeGen/VirtRegMap.cpp:1.25
--- llvm/lib/CodeGen/VirtRegMap.cpp:1.24	Wed Sep 29 21:59:33 2004
+++ llvm/lib/CodeGen/VirtRegMap.cpp	Thu Sep 30 11:10:45 2004
@@ -153,7 +153,7 @@
           unsigned VirtReg = MOP.getReg();
           unsigned PhysReg = VRM.getPhys(VirtReg);
           if (VRM.hasStackSlot(VirtReg)) {
-            int StackSlot    = VRM.getStackSlot(VirtReg);
+            int StackSlot = VRM.getStackSlot(VirtReg);
 
             if (MOP.isUse() &&
                 std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg)
@@ -161,7 +161,7 @@
               MRI.loadRegFromStackSlot(MBB, &MI, PhysReg, StackSlot);
               LoadedRegs.push_back(VirtReg);
               ++NumLoads;
-              DEBUG(std::cerr << '\t'; prior(MII)->print(std::cerr, &TM));
+              DEBUG(std::cerr << '\t' << *prior(MII));
             }
 
             if (MOP.isDef()) {
@@ -173,7 +173,7 @@
           MI.SetMachineOperandReg(i, PhysReg);
         }
       }
-      DEBUG(std::cerr << '\t'; MI.print(std::cerr, &TM));
+      DEBUG(std::cerr << '\t' << MI);
       LoadedRegs.clear();
     }
   }
@@ -228,8 +228,7 @@
           MRI->loadRegFromStackSlot(MBB, MII, PhysReg,
                                      VRM->getStackSlot(VirtReg));
           ++NumLoads;
-          DEBUG(std::cerr << "added: ";
-                prior(MII)->print(std::cerr, TM));
+          DEBUG(std::cerr << "added: " << *prior(MII));
           lastDef_[VirtReg] = MII;
         }
       }
@@ -293,10 +292,8 @@
                               PhysReg,
                               VRM->getStackSlot(VirtReg));
     ++NumStores;
-    DEBUG(std::cerr << "added: ";
-          prior(nextLastRef)->print(std::cerr, TM);
-          std::cerr << "after: ";
-          lastDef->print(std::cerr, TM));
+    DEBUG(std::cerr << "added: " << *prior(nextLastRef);
+          std::cerr << "after: " << *lastDef);
     lastDef_[VirtReg] = 0;
   }
   p2vMap_[PhysReg] = 0;
@@ -360,7 +357,7 @@
         }
     }
 
-    DEBUG(std::cerr << '\t'; MI->print(std::cerr, TM));
+    DEBUG(std::cerr << '\t' << *MI);
   }
 
   for (unsigned i = 1, e = p2vMap_.size(); i != e; ++i)