[llvm-commits] CVS: llvm/lib/CodeGen/VirtRegMap.cpp

[Chris Lattner]

Changes in directory llvm/lib/CodeGen:

VirtRegMap.cpp updated: 1.21 -> 1.22
---
Log message:

Don't use a densemap for keeping track of which vregs are already loaded, just
use a simple vector.  This speeds up -spiller=simple from taking 22s to taking
.1s on povray (debug build).  This change does not modify the generated code.


---
Diffs of the changes:  (+10 -6)

Index: llvm/lib/CodeGen/VirtRegMap.cpp
diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.21 llvm/lib/CodeGen/VirtRegMap.cpp:1.22
--- llvm/lib/CodeGen/VirtRegMap.cpp:1.21	Wed Sep 29 21:15:18 2004
+++ llvm/lib/CodeGen/VirtRegMap.cpp	Wed Sep 29 21:33:48 2004
@@ -133,25 +133,29 @@
   const TargetMachine& TM = MF.getTarget();
   const MRegisterInfo& MRI = *TM.getRegisterInfo();
 
-  DenseMap<bool, VirtReg2IndexFunctor> Loaded;
+  // LoadedRegs - Keep track of which vregs are loaded, so that we only load
+  // each vreg once (in the case where a spilled vreg is used by multiple
+  // operands).  This is always smaller than the number of operands to the
+  // current machine instr, so it should be small.
+  std::vector<unsigned> LoadedRegs;
 
   for (MachineFunction::iterator mbbi = MF.begin(), E = MF.end();
        mbbi != E; ++mbbi) {
     DEBUG(std::cerr << mbbi->getBasicBlock()->getName() << ":\n");
     for (MachineBasicBlock::iterator mii = mbbi->begin(),
            mie = mbbi->end(); mii != mie; ++mii) {
-      Loaded.grow(MF.getSSARegMap()->getLastVirtReg());
-      for (unsigned i = 0,e = mii->getNumOperands(); i != e; ++i){
+      for (unsigned i = 0, e = mii->getNumOperands(); i != e; ++i) {
         MachineOperand& mop = mii->getOperand(i);
         if (mop.isRegister() && mop.getReg() &&
             MRegisterInfo::isVirtualRegister(mop.getReg())) {
           unsigned virtReg = mop.getReg();
           unsigned physReg = VRM.getPhys(virtReg);
           if (mop.isUse() && VRM.hasStackSlot(mop.getReg()) &&
-              !Loaded[virtReg]) {
+              std::find(LoadedRegs.begin(), LoadedRegs.end(),
+                        virtReg) == LoadedRegs.end()) {
             MRI.loadRegFromStackSlot(*mbbi, mii, physReg,
                                      VRM.getStackSlot(virtReg));
-            Loaded[virtReg] = true;
+            LoadedRegs.push_back(virtReg);
             DEBUG(std::cerr << '\t';
                   prior(mii)->print(std::cerr, &TM));
             ++NumLoads;
@@ -166,7 +170,7 @@
         }
       }
       DEBUG(std::cerr << '\t'; mii->print(std::cerr, &TM));
-      Loaded.clear();
+      LoadedRegs.clear();
     }
   }
   return true;