[llvm-commits] CVS: llvm/lib/Target/PowerPC/PowerPCFrameInfo.h PowerPC.h PowerPCTargetMachine.h PowerPCTargetMachine.cpp README.txt PowerPCPEI.cpp

Nate Begeman natebegeman at mac.com
Sat Aug 14 15:16:47 PDT 2004



Changes in directory llvm/lib/Target/PowerPC:

PowerPCFrameInfo.h added (r1.1)
PowerPC.h updated: 1.7 -> 1.8
PowerPCTargetMachine.h updated: 1.6 -> 1.7
PowerPCTargetMachine.cpp updated: 1.28 -> 1.29
README.txt updated: 1.12 -> 1.13
PowerPCPEI.cpp (r1.3) removed
---
Log message:

Replace PowerPCPEI.cpp with target independant PrologEpilogInserter

---
Diffs of the changes:  (+64 -27)

Index: llvm/lib/Target/PowerPC/PowerPCFrameInfo.h
diff -c /dev/null llvm/lib/Target/PowerPC/PowerPCFrameInfo.h:1.1
*** /dev/null	Sat Aug 14 17:16:46 2004
--- llvm/lib/Target/PowerPC/PowerPCFrameInfo.h	Sat Aug 14 17:16:36 2004
***************
*** 0 ****
--- 1,45 ----
+ //===-- PowerPCFrameInfo.h - Define TargetFrameInfo for PowerPC -*- C++ -*-===//
+ // 
+ //                     The LLVM Compiler Infrastructure
+ //
+ // This file was developed by the LLVM research group and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ // 
+ //===----------------------------------------------------------------------===//
+ //
+ //
+ //----------------------------------------------------------------------------
+ 
+ #ifndef POWERPC_FRAMEINFO_H
+ #define POWERPC_FRAMEINFO_H
+ 
+ #include "PowerPC.h"
+ #include "llvm/Target/TargetFrameInfo.h"
+ #include "llvm/Target/TargetMachine.h"
+ #include "llvm/Target/MRegisterInfo.h"
+ #include <map>
+ 
+ namespace llvm {
+ 
+ class PowerPCFrameInfo: public TargetFrameInfo {
+   const TargetMachine &TM;
+   std::pair<unsigned, int> LR[1];
+   
+ public:
+ 
+   PowerPCFrameInfo(const TargetMachine &inTM)
+     : TargetFrameInfo(TargetFrameInfo::StackGrowsDown, 16, 0), TM(inTM) {
+     LR[0].first = PPC::LR;
+     LR[0].second = 8;
+   }
+ 
+   std::pair<unsigned, int> *
+   getCalleeSaveSpillSlots(unsigned &NumEntries) const {
+     NumEntries = 1;
+     return static_cast<std::pair<unsigned, int> *>(LR);
+   }
+ };
+ 
+ } // End llvm namespace
+ 
+ #endif


Index: llvm/lib/Target/PowerPC/PowerPC.h
diff -u llvm/lib/Target/PowerPC/PowerPC.h:1.7 llvm/lib/Target/PowerPC/PowerPC.h:1.8
--- llvm/lib/Target/PowerPC/PowerPC.h:1.7	Wed Aug 11 18:42:15 2004
+++ llvm/lib/Target/PowerPC/PowerPC.h	Sat Aug 14 17:16:36 2004
@@ -22,10 +22,9 @@
 class FunctionPass;
 class TargetMachine;
 
-FunctionPass *createPowerPCPEI();
 FunctionPass *createPPCBranchSelectionPass();
+FunctionPass *createPPCAsmPrinter(std::ostream &OS,TargetMachine &TM);
 FunctionPass *createPPC32ISelSimple(TargetMachine &TM);
-FunctionPass *createPPC32AsmPrinter(std::ostream &OS,TargetMachine &TM);
 FunctionPass *createPPC64ISelSimple(TargetMachine &TM);
 FunctionPass *createPPC64AsmPrinter(std::ostream &OS,TargetMachine &TM);
 


Index: llvm/lib/Target/PowerPC/PowerPCTargetMachine.h
diff -u llvm/lib/Target/PowerPC/PowerPCTargetMachine.h:1.6 llvm/lib/Target/PowerPC/PowerPCTargetMachine.h:1.7
--- llvm/lib/Target/PowerPC/PowerPCTargetMachine.h:1.6	Wed Aug 11 18:47:08 2004
+++ llvm/lib/Target/PowerPC/PowerPCTargetMachine.h	Sat Aug 14 17:16:36 2004
@@ -14,11 +14,12 @@
 #ifndef POWERPC_TARGETMACHINE_H
 #define POWERPC_TARGETMACHINE_H
 
+#include "PowerPCFrameInfo.h"
+#include "PowerPCInstrInfo.h"
+#include "PowerPCJITInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/PassManager.h"
-#include "PowerPCInstrInfo.h"
-#include "PowerPCJITInfo.h"
 #include <set>
 
 namespace llvm {
@@ -28,12 +29,12 @@
 
 class PowerPCTargetMachine : public TargetMachine {
   PowerPCInstrInfo InstrInfo;
-  TargetFrameInfo FrameInfo;
+  PowerPCFrameInfo FrameInfo;
   PowerPCJITInfo JITInfo;
 
 protected:
   PowerPCTargetMachine(const std::string &name, IntrinsicLowering *IL,
-                       const TargetData &TD, const TargetFrameInfo &TFI,
+                       const TargetData &TD, const PowerPCFrameInfo &TFI,
                        const PowerPCJITInfo &TJI, bool is64b);
 public:
   virtual const PowerPCInstrInfo *getInstrInfo() const { return &InstrInfo; }


Index: llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp
diff -u llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.28 llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.29
--- llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp:1.28	Thu Aug 12 12:16:43 2004
+++ llvm/lib/Target/PowerPC/PowerPCTargetMachine.cpp	Sat Aug 14 17:16:36 2004
@@ -12,6 +12,7 @@
 
 #include "PowerPC.h"
 #include "PowerPCTargetMachine.h"
+#include "PowerPCFrameInfo.h"
 #include "PPC32TargetMachine.h"
 #include "PPC64TargetMachine.h"
 #include "PPC32JITInfo.h"
@@ -48,7 +49,7 @@
 PowerPCTargetMachine::PowerPCTargetMachine(const std::string &name,
                                            IntrinsicLowering *IL,
                                            const TargetData &TD,
-                                           const TargetFrameInfo &TFI,
+                                           const PowerPCFrameInfo &TFI,
                                            const PowerPCJITInfo &TJI,
                                            bool is64b) 
   : TargetMachine(name, IL, TD), InstrInfo(is64b), FrameInfo(TFI), JITInfo(TJI) 
@@ -96,17 +97,15 @@
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
-  // PowerPC-specific prolog/epilog code inserter to put the fills/spills in the
-  // right spots.
-  PM.add(createPowerPCPEI());
+  PM.add(createPrologEpilogCodeInserter());
   
-  // Must run branch selection immediately preceding the printer
+  // Must run branch selection immediately preceding the asm printer
   PM.add(createPPCBranchSelectionPass());
   
   if (AIX)
     PM.add(createPPC64AsmPrinter(Out, *this));
   else
-    PM.add(createPPC32AsmPrinter(Out, *this));
+    PM.add(createPPCAsmPrinter(Out, *this));
     
   PM.add(createMachineCodeDeleter());
   return false;
@@ -148,16 +147,14 @@
                                                IntrinsicLowering *IL)
   : PowerPCTargetMachine(PPC32, IL, 
                          TargetData(PPC32,false,4,4,4,4,4,4,2,1,4),
-                         TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,0),
-                         PPC32JITInfo(*this), false) {}
+                         PowerPCFrameInfo(*this), PPC32JITInfo(*this), false) {}
 
 /// PPC64TargetMachine ctor - Create a LP64 architecture model
 ///
 PPC64TargetMachine::PPC64TargetMachine(const Module &M, IntrinsicLowering *IL)
   : PowerPCTargetMachine(PPC64, IL,
                          TargetData(PPC64,false,8,4,4,4,4,4,2,1,4),
-                         TargetFrameInfo(TargetFrameInfo::StackGrowsDown,16,0),
-                         PPC64JITInfo(*this), true) {}
+                         PowerPCFrameInfo(*this), PPC64JITInfo(*this), true) {}
 
 unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
   if (M.getEndianness()  == Module::BigEndian &&


Index: llvm/lib/Target/PowerPC/README.txt
diff -u llvm/lib/Target/PowerPC/README.txt:1.12 llvm/lib/Target/PowerPC/README.txt:1.13
--- llvm/lib/Target/PowerPC/README.txt:1.12	Tue Aug 10 15:42:36 2004
+++ llvm/lib/Target/PowerPC/README.txt	Sat Aug 14 17:16:36 2004
@@ -1,6 +1,10 @@
 TODO:
 * implement cast fp to bool
-* implement signed right shift by reg
+* implement algebraic shift right long by reg
+* implement scheduling info
+* implement powerpc-64 for darwin
+* implement powerpc-64 for aix
+* fix rlwimi generation to be use-and-def
 * fix ulong to double:
   floatdidf assumes signed longs.  so if the high but of a ulong
   just happens to be set, you get the wrong sign.  The fix for this
@@ -17,7 +21,6 @@
   shift right ulong a, 1 (we could use emitShift)
   call floatdidf
   fadd f1, f1, f1 (fp left shift by 1)
-* PowerPCPEI.cpp needs to be replaced by shiny new target hook
 * setCondInst needs to know branchless versions of seteq/setne/etc
 * cast elimination pass (uint -> sbyte -> short, kill the byte -> short)
 * should hint to the branch select pass that it doesn't need to print the
@@ -26,13 +29,6 @@
 	b .LBBl42__2E_expand_function_8_42	; NewDefault
 	b .LBBl42__2E_expand_function_8_42	; NewDefault
 
-Current hacks:
-* lazy insert of GlobalBaseReg definition at front of first MBB
-  A prime candidate for sabre's future "slightly above ISel" passes.
-* cast code is huge, unwieldy.  Should probably be broken up into
-  smaller pieces.
-* visitLoadInst is getting awfully cluttered as well.
-
 Currently failing tests:
 * SingleSource
   `- Regression
@@ -46,8 +42,7 @@
 * MultiSource
   |- Applications
   |  `- burg: miscompilation
-  |  `- siod: llc bus error
   |  `- hbd: miscompilation
   |  `- d (make_dparser): miscompilation
   `- Benchmarks
-     `- MallocBench/make: miscompilation
+     `- MallocBench/gs: miscompilation






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