[llvm-commits] CVS: llvm/lib/Target/X86/X86InstrInfo.td X86.td X86InstrInfo.h

Chris Lattner lattner at cs.uiuc.edu
Wed Aug 11 00:12:19 PDT 2004



Changes in directory llvm/lib/Target/X86:

X86InstrInfo.td updated: 1.100 -> 1.101
X86.td updated: 1.12 -> 1.13
X86InstrInfo.h updated: 1.42 -> 1.43
---
Log message:

Remove a bunch of ad-hoc target-specific flags that were only used by the
old asmprinter.


---
Diffs of the changes:  (+16 -57)

Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.100 llvm/lib/Target/X86/X86InstrInfo.td:1.101
--- llvm/lib/Target/X86/X86InstrInfo.td:1.100	Wed Aug 11 01:59:12 2004
+++ llvm/lib/Target/X86/X86InstrInfo.td	Wed Aug 11 02:12:02 2004
@@ -62,18 +62,6 @@
 def Imm16  : ImmType<2>;
 def Imm32  : ImmType<3>;
 
-// MemType - This specifies the immediate type used by an instruction. This is
-// part of the ad-hoc solution used to emit machine instruction encodings by our
-// machine code emitter.
-class MemType<bits<3> val> {
-  bits<3> Value = val;
-}
-def NoMem  : MemType<0>;
-def Mem16  : MemType<2>;
-def Mem32  : MemType<3>;
-def Mem64  : MemType<4>;
-def Mem80  : MemType<5>;
-
 // FPFormat - This specifies what form this FP instruction has.  This is used by
 // the Floating-Point stackifier pass.
 class FPFormat<bits<3> val> {
@@ -89,26 +77,23 @@
 def SpecialFP  : FPFormat<7>;
 
 
-class X86Inst<string nam, bits<8> opcod, Format f, MemType m, ImmType i> : Instruction {
+class X86Inst<bits<8> opcod, Format f, ImmType i, dag ops, string AsmStr> : Instruction {
   let Namespace = "X86";
 
-  let Name = nam;
   bits<8> Opcode = opcod;
   Format Form = f;
   bits<5> FormBits = Form.Value;
-  MemType MemT = m;
-  bits<3> MemTypeBits = MemT.Value;
   ImmType ImmT = i;
   bits<2> ImmTypeBits = ImmT.Value;
 
+  dag OperandList = ops;
+  string AsmString = AsmStr;
+
   //
   // Attributes specific to X86 instructions...
   //
   bit hasOpSizePrefix = 0; // Does this inst have a 0x66 prefix?
 
-  // Flag whether implicit register usage is printed after the instruction.
-  bit printImplicitUsesAfter  = 0;
-
   bits<4> Prefix = 0;       // Which prefix byte does this inst have?
   FPFormat FPForm;          // What flavor of FP instruction is this?
   bits<3> FPFormBits = 0;
@@ -119,12 +104,6 @@
   list<Register> Defs = defs;
 }
 
-// II - InstructionInfo - this will eventually replace the I class.
-class II<dag ops, string AsmStr> {
-  dag OperandList = ops;
-  string AsmString = AsmStr;
-}
-
 
 // Prefix byte classes which are used to indicate to the ad-hoc machine code
 // emitter that various prefix bytes are required.
@@ -144,12 +123,11 @@
 //===----------------------------------------------------------------------===//
 // Instruction templates...
 
-class I<bits<8> o, Format f, dag ops, string asm> : X86Inst<"", o, f, NoMem, NoImm>, II<ops, asm>;
+class I<bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, NoImm, ops, asm>;
 
-class Ii<bits<8> o, Format f, ImmType i> : X86Inst<"", o, f, NoMem, i>;
-class Ii8 <bits<8> o, Format f, dag ops, string asm> : Ii<o, f, Imm8 >, II<ops, asm>;
-class Ii16<bits<8> o, Format f, dag ops, string asm> : Ii<o, f, Imm16>, II<ops, asm>;
-class Ii32<bits<8> o, Format f, dag ops, string asm> : Ii<o, f, Imm32>, II<ops, asm>;
+class Ii8 <bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, Imm8 , ops, asm>;
+class Ii16<bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, Imm16, ops, asm>;
+class Ii32<bits<8> o, Format f, dag ops, string asm> : X86Inst<o, f, Imm32, ops, asm>;
 
 //===----------------------------------------------------------------------===//
 // Instruction list...
@@ -893,7 +871,7 @@
 
 // Floating point instruction template
 class FPI<bits<8> o, Format F, FPFormat fp, dag ops, string asm>
-  : X86Inst<"", o, F, NoMem, NoImm>, II<ops, asm> {
+  : X86Inst<o, F, NoImm, ops, asm> {
   let FPForm = fp; let FPFormBits = FPForm.Value;
 }
 


Index: llvm/lib/Target/X86/X86.td
diff -u llvm/lib/Target/X86/X86.td:1.12 llvm/lib/Target/X86/X86.td:1.13
--- llvm/lib/Target/X86/X86.td:1.12	Sun Aug  1 03:23:17 2004
+++ llvm/lib/Target/X86/X86.td	Wed Aug 11 02:12:03 2004
@@ -36,19 +36,15 @@
   let TSFlagsFields = ["FormBits",
                        "hasOpSizePrefix",
                        "Prefix",
-                       "MemTypeBits",
                        "ImmTypeBits",
                        "FPFormBits",
-                       "printImplicitUsesAfter", 
                        "Opcode"];
   let TSFlagsShifts = [0,
                        5,
                        6,
                        10,
-                       13,
-                       15,
-                       18,
-                       19];
+                       12,
+                       16];
 }
 
 def X86 : Target {


Index: llvm/lib/Target/X86/X86InstrInfo.h
diff -u llvm/lib/Target/X86/X86InstrInfo.h:1.42 llvm/lib/Target/X86/X86InstrInfo.h:1.43
--- llvm/lib/Target/X86/X86InstrInfo.h:1.42	Sun Aug  1 03:23:17 2004
+++ llvm/lib/Target/X86/X86InstrInfo.h	Wed Aug 11 02:12:04 2004
@@ -109,21 +109,9 @@
     DE = 9 << Op0Shift,   DF = 10 << Op0Shift,
 
     //===------------------------------------------------------------------===//
-    // This three-bit field describes the size of a memory operand.  Zero is
-    // unused so that we can tell if we forgot to set a value.
-    MemShift = 10,
-    MemMask  = 7 << MemShift,
-    Mem8     = 1 << MemShift,
-    Mem16    = 2 << MemShift,
-    Mem32    = 3 << MemShift,
-    Mem64    = 4 << MemShift,
-    Mem80    = 5 << MemShift,
-    Mem128   = 6 << MemShift,
-
-    //===------------------------------------------------------------------===//
     // This two-bit field describes the size of an immediate operand.  Zero is
     // unused so that we can tell if we forgot to set a value.
-    ImmShift = 13,
+    ImmShift = 10,
     ImmMask  = 7 << ImmShift,
     Imm8     = 1 << ImmShift,
     Imm16    = 2 << ImmShift,
@@ -133,7 +121,7 @@
     // FP Instruction Classification...  Zero is non-fp instruction.
 
     // FPTypeMask - Mask for all of the FP types...
-    FPTypeShift = 15,
+    FPTypeShift = 12,
     FPTypeMask  = 7 << FPTypeShift,
 
     // NotFP - The default, set for instructions that do not use FP registers.
@@ -165,13 +153,10 @@
     // SpecialFP - Special instruction forms.  Dispatch by opcode explicitly.
     SpecialFP  = 7 << FPTypeShift,
 
-    // PrintImplUsesAfter - Print out implicit uses in the assembly output after
-    // the normal operands.
-    PrintImplUsesAfter = 1 << 18,
-
-    OpcodeShift   = 19,
+    // Bit 15 is unused.
+    OpcodeShift   = 16,
     OpcodeMask    = 0xFF << OpcodeShift,
-    // Bits 27 -> 31 are unused
+    // Bits 24 -> 31 are unused
   };
 }
 






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