[llvm-commits] CVS: llvm/utils/TableGen/CodeGenInstruction.h CodeGenTarget.cpp CodeGenTarget.h InstrInfoEmitter.cpp InstrInfoEmitter.h
Chris Lattner
lattner at cs.uiuc.edu
Sat Jul 31 22:04:10 PDT 2004
Changes in directory llvm/utils/TableGen:
CodeGenInstruction.h added (r1.1)
CodeGenTarget.cpp updated: 1.9 -> 1.10
CodeGenTarget.h updated: 1.8 -> 1.9
InstrInfoEmitter.cpp updated: 1.10 -> 1.11
InstrInfoEmitter.h updated: 1.5 -> 1.6
---
Log message:
Add, and start using, the CodeGenInstruction class. This class represents
an instance of the Instruction tablegen class.
---
Diffs of the changes: (+144 -47)
Index: llvm/utils/TableGen/CodeGenInstruction.h
diff -c /dev/null llvm/utils/TableGen/CodeGenInstruction.h:1.1
*** /dev/null Sun Aug 1 00:04:10 2004
--- llvm/utils/TableGen/CodeGenInstruction.h Sun Aug 1 00:04:00 2004
***************
*** 0 ****
--- 1,49 ----
+ //===- CodeGenInstruction.h - Instruction Class Wrapper ---------*- C++ -*-===//
+ //
+ // The LLVM Compiler Infrastructure
+ //
+ // This file was developed by the LLVM research group and is distributed under
+ // the University of Illinois Open Source License. See LICENSE.TXT for details.
+ //
+ //===----------------------------------------------------------------------===//
+ //
+ // This file defines a wrapper class for the 'Instruction' TableGen class.
+ //
+ //===----------------------------------------------------------------------===//
+
+ #ifndef CODEGEN_INSTRUCTION_H
+ #define CODEGEN_INSTRUCTION_H
+
+ #include <string>
+ #include <vector>
+ #include <utility>
+
+ namespace llvm {
+ class Record;
+
+ struct CodeGenInstruction {
+ Record *TheDef; // The actual record defining this instruction.
+ std::string Name; // Contents of the 'Name' field.
+ std::string Namespace; // The namespace the instruction is in.
+
+ /// AsmString - The format string used to emit a .s file for the
+ /// instruction.
+ std::string AsmString;
+
+ /// OperandList - The list of declared operands, along with their declared
+ /// type (which is a record).
+ std::vector<std::pair<Record*, std::string> > OperandList;
+
+ // Various boolean values we track for the instruction.
+ bool isReturn;
+ bool isBranch;
+ bool isBarrier;
+ bool isCall;
+ bool isTwoAddress;
+ bool isTerminator;
+
+ CodeGenInstruction(Record *R);
+ };
+ }
+
+ #endif
Index: llvm/utils/TableGen/CodeGenTarget.cpp
diff -u llvm/utils/TableGen/CodeGenTarget.cpp:1.9 llvm/utils/TableGen/CodeGenTarget.cpp:1.10
--- llvm/utils/TableGen/CodeGenTarget.cpp:1.9 Sat Jul 31 23:04:35 2004
+++ llvm/utils/TableGen/CodeGenTarget.cpp Sun Aug 1 00:04:00 2004
@@ -97,3 +97,39 @@
return TargetRec->getValueAsDef("InstructionSet");
}
+void CodeGenTarget::ReadInstructions() const {
+ std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
+
+ if (Insts.size() == 0)
+ throw std::string("No 'Instruction' subclasses defined!");
+
+ for (unsigned i = 0, e = Insts.size(); i != e; ++i)
+ Instructions.insert(std::make_pair(Insts[i]->getName(), Insts[i]));
+}
+
+/// getPHIInstruction - Return the designated PHI instruction.
+const CodeGenInstruction &CodeGenTarget::getPHIInstruction() const {
+ Record *PHI = getInstructionSet()->getValueAsDef("PHIInst");
+ std::map<std::string, CodeGenInstruction>::const_iterator I =
+ getInstructions().find(PHI->getName());
+ if (I == Instructions.end())
+ throw "Could not find PHI instruction named '" + PHI->getName() + "'!";
+ return I->second;
+}
+
+CodeGenInstruction::CodeGenInstruction(Record *R) : TheDef(R) {
+ Name = R->getValueAsString("Name");
+ Namespace = R->getValueAsString("Namespace");
+ AsmString = R->getValueAsString("AsmString");
+
+ //TODO: Parse OperandList
+
+ isReturn = R->getValueAsBit("isReturn");
+ isBranch = R->getValueAsBit("isBranch");
+ isBarrier = R->getValueAsBit("isBarrier");
+ isCall = R->getValueAsBit("isCall");
+ isTwoAddress = R->getValueAsBit("isTwoAddress");
+ isTerminator = R->getValueAsBit("isTerminator");
+}
+
+
Index: llvm/utils/TableGen/CodeGenTarget.h
diff -u llvm/utils/TableGen/CodeGenTarget.h:1.8 llvm/utils/TableGen/CodeGenTarget.h:1.9
--- llvm/utils/TableGen/CodeGenTarget.h:1.8 Sat Jul 31 23:04:35 2004
+++ llvm/utils/TableGen/CodeGenTarget.h Sun Aug 1 00:04:00 2004
@@ -17,10 +17,10 @@
#ifndef CODEGEN_TARGET_H
#define CODEGEN_TARGET_H
+#include "CodeGenInstruction.h"
#include "llvm/CodeGen/ValueTypes.h"
#include <iosfwd>
-#include <string>
-#include <vector>
+#include <map>
namespace llvm {
@@ -43,6 +43,8 @@
std::vector<Record*> CalleeSavedRegisters;
MVT::ValueType PointerType;
+ mutable std::map<std::string, CodeGenInstruction> Instructions;
+ void ReadInstructions() const;
public:
CodeGenTarget();
@@ -55,12 +57,24 @@
MVT::ValueType getPointerType() const { return PointerType; }
- // getInstructionSet - Return the InstructionSet object...
+ // getInstructionSet - Return the InstructionSet object.
+ ///
Record *getInstructionSet() const;
- // getInstructionSet - Return the CodeGenInstructionSet object for this
- // target, lazily reading it from the record keeper as needed.
- // CodeGenInstructionSet *getInstructionSet -
+ /// getPHIInstruction - Return the designated PHI instruction.
+ const CodeGenInstruction &getPHIInstruction() const;
+
+ /// getInstructions - Return all of the instructions defined for this target.
+ ///
+ const std::map<std::string, CodeGenInstruction> &getInstructions() const {
+ if (Instructions.empty()) ReadInstructions();
+ return Instructions;
+ }
+
+ typedef std::map<std::string,
+ CodeGenInstruction>::const_iterator inst_iterator;
+ inst_iterator inst_begin() const { return getInstructions().begin(); }
+ inst_iterator inst_end() const { return Instructions.end(); }
};
} // End llvm namespace
Index: llvm/utils/TableGen/InstrInfoEmitter.cpp
diff -u llvm/utils/TableGen/InstrInfoEmitter.cpp:1.10 llvm/utils/TableGen/InstrInfoEmitter.cpp:1.11
--- llvm/utils/TableGen/InstrInfoEmitter.cpp:1.10 Sat Jul 31 23:04:35 2004
+++ llvm/utils/TableGen/InstrInfoEmitter.cpp Sun Aug 1 00:04:00 2004
@@ -19,31 +19,28 @@
// runEnums - Print out enum values for all of the instructions.
void InstrInfoEmitter::runEnums(std::ostream &OS) {
- std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
-
- if (Insts.size() == 0)
- throw std::string("No 'Instruction' subclasses defined!");
-
- std::string Namespace = Insts[0]->getValueAsString("Namespace");
-
EmitSourceFileHeader("Target Instruction Enum Values", OS);
- if (!Namespace.empty())
- OS << "namespace " << Namespace << " {\n";
- OS << " enum {\n";
-
CodeGenTarget Target;
// We must emit the PHI opcode first...
Record *InstrInfo = Target.getInstructionSet();
Record *PHI = InstrInfo->getValueAsDef("PHIInst");
+ std::string Namespace = Target.inst_begin()->second.Namespace;
+
+ if (!Namespace.empty())
+ OS << "namespace " << Namespace << " {\n";
+ OS << " enum {\n";
+
OS << " " << PHI->getName() << ", \t// 0 (fixed for all targets)\n";
- // Print out the rest of the instructions now...
- for (unsigned i = 0, e = Insts.size(); i != e; ++i)
- if (Insts[i] != PHI)
- OS << " " << Insts[i]->getName() << ", \t// " << i+1 << "\n";
+ // Print out the rest of the instructions now.
+ unsigned i = 0;
+ for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
+ E = Target.inst_end(); II != E; ++II)
+ if (II->second.TheDef != PHI)
+ OS << " " << II->first << ", \t// " << ++i << "\n";
OS << " };\n";
if (!Namespace.empty())
@@ -71,16 +68,14 @@
Record *InstrInfo = Target.getInstructionSet();
Record *PHI = InstrInfo->getValueAsDef("PHIInst");
- std::vector<Record*> Instructions =
- Records.getAllDerivedDefinitions("Instruction");
-
// Emit empty implicit uses and defs lists
OS << "static const unsigned EmptyImpUses[] = { 0 };\n"
<< "static const unsigned EmptyImpDefs[] = { 0 };\n";
// Emit all of the instruction's implicit uses and defs...
- for (unsigned i = 0, e = Instructions.size(); i != e; ++i) {
- Record *Inst = Instructions[i];
+ for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
+ E = Target.inst_end(); II != E; ++II) {
+ Record *Inst = II->second.TheDef;
ListInit *LI = Inst->getValueAsListInit("Uses");
if (LI->getSize()) printDefList(LI, Inst->getName()+"ImpUses", OS);
LI = Inst->getValueAsListInit("Defs");
@@ -89,27 +84,28 @@
OS << "\nstatic const TargetInstrDescriptor " << TargetName
<< "Insts[] = {\n";
- emitRecord(PHI, 0, InstrInfo, OS);
+ emitRecord(Target.getPHIInstruction(), 0, InstrInfo, OS);
- for (unsigned i = 0, e = Instructions.size(); i != e; ++i)
- if (Instructions[i] != PHI)
- emitRecord(Instructions[i], i+1, InstrInfo, OS);
+ unsigned i = 0;
+ for (CodeGenTarget::inst_iterator II = Target.inst_begin(),
+ E = Target.inst_end(); II != E; ++II)
+ if (II->second.TheDef != PHI)
+ emitRecord(II->second, ++i, InstrInfo, OS);
OS << "};\n";
EmitSourceFileTail(OS);
}
-void InstrInfoEmitter::emitRecord(Record *R, unsigned Num, Record *InstrInfo,
- std::ostream &OS) {
- OS << " { \"" << R->getValueAsString("Name")
- << "\",\t-1, -1, 0, false, 0, 0, 0, 0";
+void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
+ Record *InstrInfo, std::ostream &OS) {
+ OS << " { \"" << Inst.Name << "\",\t-1, -1, 0, false, 0, 0, 0, 0";
// Emit all of the target indepedent flags...
- if (R->getValueAsBit("isReturn")) OS << "|M_RET_FLAG";
- if (R->getValueAsBit("isBranch")) OS << "|M_BRANCH_FLAG";
- if (R->getValueAsBit("isBarrier")) OS << "|M_BARRIER_FLAG";
- if (R->getValueAsBit("isCall" )) OS << "|M_CALL_FLAG";
- if (R->getValueAsBit("isTwoAddress")) OS << "|M_2_ADDR_FLAG";
- if (R->getValueAsBit("isTerminator")) OS << "|M_TERMINATOR_FLAG";
+ if (Inst.isReturn) OS << "|M_RET_FLAG";
+ if (Inst.isBranch) OS << "|M_BRANCH_FLAG";
+ if (Inst.isBarrier) OS << "|M_BARRIER_FLAG";
+ if (Inst.isCall) OS << "|M_CALL_FLAG";
+ if (Inst.isTwoAddress) OS << "|M_2_ADDR_FLAG";
+ if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
OS << ", 0";
// Emit all of the target-specific flags...
@@ -120,25 +116,25 @@
":(TargetInfoFields, TargetInfoPositions) must be equal!";
for (unsigned i = 0, e = LI->getSize(); i != e; ++i)
- emitShiftedValue(R, dynamic_cast<StringInit*>(LI->getElement(i)),
+ emitShiftedValue(Inst.TheDef, dynamic_cast<StringInit*>(LI->getElement(i)),
dynamic_cast<IntInit*>(Shift->getElement(i)), OS);
OS << ", ";
// Emit the implicit uses and defs lists...
- LI = R->getValueAsListInit("Uses");
+ LI = Inst.TheDef->getValueAsListInit("Uses");
if (!LI->getSize())
OS << "EmptyImpUses, ";
else
- OS << R->getName() << "ImpUses, ";
+ OS << Inst.TheDef->getName() << "ImpUses, ";
- LI = R->getValueAsListInit("Defs");
+ LI = Inst.TheDef->getValueAsListInit("Defs");
if (!LI->getSize())
OS << "EmptyImpDefs ";
else
- OS << R->getName() << "ImpDefs ";
+ OS << Inst.TheDef->getName() << "ImpDefs ";
- OS << " }, // Inst #" << Num << " = " << R->getName() << "\n";
+ OS << " }, // Inst #" << Num << " = " << Inst.TheDef->getName() << "\n";
}
void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
Index: llvm/utils/TableGen/InstrInfoEmitter.h
diff -u llvm/utils/TableGen/InstrInfoEmitter.h:1.5 llvm/utils/TableGen/InstrInfoEmitter.h:1.6
--- llvm/utils/TableGen/InstrInfoEmitter.h:1.5 Tue Nov 11 16:41:34 2003
+++ llvm/utils/TableGen/InstrInfoEmitter.h Sun Aug 1 00:04:00 2004
@@ -22,6 +22,7 @@
class StringInit;
class IntInit;
class ListInit;
+class CodeGenInstruction;
class InstrInfoEmitter : public TableGenBackend {
RecordKeeper &Records;
@@ -36,7 +37,8 @@
private:
void printDefList(ListInit *LI, const std::string &Name,
std::ostream &OS) const;
- void emitRecord(Record *R, unsigned Num, Record *InstrInfo, std::ostream &OS);
+ void emitRecord(const CodeGenInstruction &Inst, unsigned Num,
+ Record *InstrInfo, std::ostream &OS);
void emitShiftedValue(Record *R, StringInit *Val, IntInit *Shift,
std::ostream &OS);
};
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