[llvm-commits] CVS: llvm/include/llvm/Target/TargetInstrInfo.h

[Alkis Evlogimenos]

Changes in directory llvm/include/llvm/Target:

TargetInstrInfo.h updated: 1.63 -> 1.64

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Log message:

Doxygenify some comments.


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Diffs of the changes:  (+6 -10)

Index: llvm/include/llvm/Target/TargetInstrInfo.h
diff -u llvm/include/llvm/Target/TargetInstrInfo.h:1.63 llvm/include/llvm/Target/TargetInstrInfo.h:1.64
--- llvm/include/llvm/Target/TargetInstrInfo.h:1.63	Sat Jul 31 03:55:23 2004
+++ llvm/include/llvm/Target/TargetInstrInfo.h	Sat Jul 31 03:57:27 2004
@@ -147,27 +147,23 @@
     return get(Opcode).Flags & M_TERMINATOR_FLAG;
   }
 
-  //
-  // Return true if the instruction is a register to register move and
-  // leave the source and dest operands in the passed parameters.
-  //
+  /// Return true if the instruction is a register to register move
+  /// and leave the source and dest operands in the passed parameters.
   virtual bool isMoveInstr(const MachineInstr& MI,
                            unsigned& sourceReg,
                            unsigned& destReg) const {
     return false;
   }
 
-  //
-  // Insert a goto (unconditional branch) sequence to MBB, right
-  // before MBBI
+  /// Insert a goto (unconditional branch) sequence to MBB, right
+  /// before MBBI
   virtual void insertGoto(const MachineBasicBlock& MBB,
                           MachineBasicBlock::iterator MBBI) const {
     assert(0 && "Target didn't implement insertGoto!");
   }
 
-  //
-  // Reverses the branch condition of the MachineInstr pointed by
-  // MI. The instruction is replaced and the new MI is returned.
+  /// Reverses the branch condition of the MachineInstr pointed by
+  /// MI. The instruction is replaced and the new MI is returned.
   virtual MachineBasicBlock::iterator
   reverseBranchCondition(MachineBasicBlock::iterator MI) const {
     assert(0 && "Target didn't implement reverseBranchCondition!");