[llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp

[John Criswell]

Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.221 -> 1.222

---
Log message:

Reversed the order of the llvm.writeport() operands so that the value
is listed first and the address is listed second.



---
Diffs of the changes:  (+6 -6)

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.221 llvm/lib/Target/X86/InstSelectSimple.cpp:1.222
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.221	Fri Apr  9 10:10:15 2004
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Fri Apr  9 14:09:13 2004
@@ -1702,7 +1702,7 @@
     // acceptable range for this architecture.
     //
     //
-    if ((CI.getOperand(1)->getType()->getPrimitiveSize()) != 2) {
+    if ((CI.getOperand(2)->getType()->getPrimitiveSize()) != 2) {
       std::cerr << "llvm.writeport: Address size is not 16 bits\n";
       exit (1);
     }
@@ -1711,18 +1711,18 @@
     // Now, move the I/O port address into the DX register and the value to
     // write into the AL/AX/EAX register.
     //
-    BuildMI(BB, X86::MOV16rr, 1, X86::DX).addReg(getReg(CI.getOperand(1)));
-    switch (CI.getOperand(2)->getType()->getPrimitiveSize()) {
+    BuildMI(BB, X86::MOV16rr, 1, X86::DX).addReg(getReg(CI.getOperand(2)));
+    switch (CI.getOperand(1)->getType()->getPrimitiveSize()) {
       case 1:
-        BuildMI(BB, X86::MOV8rr, 1, X86::AL).addReg(getReg(CI.getOperand(2)));
+        BuildMI(BB, X86::MOV8rr, 1, X86::AL).addReg(getReg(CI.getOperand(1)));
         BuildMI(BB, X86::OUT8, 0);
         break;
       case 2:
-        BuildMI(BB, X86::MOV16rr, 1, X86::AX).addReg(getReg(CI.getOperand(2)));
+        BuildMI(BB, X86::MOV16rr, 1, X86::AX).addReg(getReg(CI.getOperand(1)));
         BuildMI(BB, X86::OUT16, 0);
         break;
       case 4:
-        BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(getReg(CI.getOperand(2)));
+        BuildMI(BB, X86::MOV32rr, 1, X86::EAX).addReg(getReg(CI.getOperand(1)));
         BuildMI(BB, X86::OUT32, 0);
         break;
       default: