[llvm-commits] CVS: llvm/lib/Target/X86/X86RegisterInfo.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86RegisterInfo.cpp updated: 1.78 -> 1.79

---
Log message:

Implement spill code folding for all of the conditional move instructions


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Diffs of the changes:  (+21 -0)

Index: llvm/lib/Target/X86/X86RegisterInfo.cpp
diff -u llvm/lib/Target/X86/X86RegisterInfo.cpp:1.78 llvm/lib/Target/X86/X86RegisterInfo.cpp:1.79
--- llvm/lib/Target/X86/X86RegisterInfo.cpp:1.78	Sun Mar 14 14:14:27 2004
+++ llvm/lib/Target/X86/X86RegisterInfo.cpp	Tue Mar 30 15:29:47 2004
@@ -259,9 +259,30 @@
     case X86::MOV8rr:    return MakeRMInst(X86::MOV8rm , FrameIndex, MI);
     case X86::MOV16rr:   return MakeRMInst(X86::MOV16rm, FrameIndex, MI);
     case X86::MOV32rr:   return MakeRMInst(X86::MOV32rm, FrameIndex, MI);
+    case X86::CMOVB16rr: return MakeRMInst(X86::CMOVB16rm , FrameIndex, MI);
+    case X86::CMOVB32rr: return MakeRMInst(X86::CMOVB32rm , FrameIndex, MI);
+    case X86::CMOVAE16rr: return MakeRMInst(X86::CMOVAE16rm , FrameIndex, MI);
+    case X86::CMOVAE32rr: return MakeRMInst(X86::CMOVAE32rm , FrameIndex, MI);
     case X86::CMOVE16rr: return MakeRMInst(X86::CMOVE16rm , FrameIndex, MI);
+    case X86::CMOVE32rr: return MakeRMInst(X86::CMOVE32rm , FrameIndex, MI);
+    case X86::CMOVNE16rr:return MakeRMInst(X86::CMOVNE16rm, FrameIndex, MI);
     case X86::CMOVNE32rr:return MakeRMInst(X86::CMOVNE32rm, FrameIndex, MI);
+    case X86::CMOVBE16rr:return MakeRMInst(X86::CMOVBE16rm, FrameIndex, MI);
+    case X86::CMOVBE32rr:return MakeRMInst(X86::CMOVBE32rm, FrameIndex, MI);
+    case X86::CMOVA16rr:return MakeRMInst(X86::CMOVA16rm, FrameIndex, MI);
+    case X86::CMOVA32rr:return MakeRMInst(X86::CMOVA32rm, FrameIndex, MI);
+    case X86::CMOVS16rr: return MakeRMInst(X86::CMOVS16rm , FrameIndex, MI);
     case X86::CMOVS32rr: return MakeRMInst(X86::CMOVS32rm , FrameIndex, MI);
+    case X86::CMOVNS16rr: return MakeRMInst(X86::CMOVNS16rm , FrameIndex, MI);
+    case X86::CMOVNS32rr: return MakeRMInst(X86::CMOVNS32rm , FrameIndex, MI);
+    case X86::CMOVL16rr: return MakeRMInst(X86::CMOVL16rm , FrameIndex, MI);
+    case X86::CMOVL32rr: return MakeRMInst(X86::CMOVL32rm , FrameIndex, MI);
+    case X86::CMOVGE16rr: return MakeRMInst(X86::CMOVGE16rm , FrameIndex, MI);
+    case X86::CMOVGE32rr: return MakeRMInst(X86::CMOVGE32rm , FrameIndex, MI);
+    case X86::CMOVLE16rr: return MakeRMInst(X86::CMOVLE16rm , FrameIndex, MI);
+    case X86::CMOVLE32rr: return MakeRMInst(X86::CMOVLE32rm , FrameIndex, MI);
+    case X86::CMOVG16rr: return MakeRMInst(X86::CMOVG16rm , FrameIndex, MI);
+    case X86::CMOVG32rr: return MakeRMInst(X86::CMOVG32rm , FrameIndex, MI);
     case X86::ADD8rr:    return MakeRMInst(X86::ADD8rm , FrameIndex, MI);
     case X86::ADD16rr:   return MakeRMInst(X86::ADD16rm, FrameIndex, MI);
     case X86::ADD32rr:   return MakeRMInst(X86::ADD32rm, FrameIndex, MI);