[llvm-commits] CVS: llvm/lib/Target/X86/InstSelectSimple.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

InstSelectSimple.cpp updated: 1.156 -> 1.157

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Log message:

There is no need to emit a shift if the size is constant, which is common


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Diffs of the changes:  (+14 -7)

Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.156 llvm/lib/Target/X86/InstSelectSimple.cpp:1.157
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.156	Thu Feb 12 11:53:22 2004
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Fri Feb 13 17:36:47 2004
@@ -1198,21 +1198,29 @@
     }
 
     // Turn the byte code into # iterations
-    unsigned ByteReg = getReg(CI.getOperand(3));
+    unsigned ByteReg;
     unsigned CountReg;
     
     switch (Align & 3) {
     case 2:   // WORD aligned
-      CountReg = makeAnotherReg(Type::IntTy);
-      BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1);
+      if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) {
+        CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/2));
+      } else {
+        CountReg = makeAnotherReg(Type::IntTy);
+        BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(1);
+      }
       break;
     case 0:   // DWORD aligned
-      CountReg = makeAnotherReg(Type::IntTy);
-      BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2);
+      if (ConstantInt *I = dyn_cast<ConstantInt>(CI.getOperand(3))) {
+        CountReg = getReg(ConstantUInt::get(Type::UIntTy, I->getRawValue()/4));
+      } else {
+        CountReg = makeAnotherReg(Type::IntTy);
+        BuildMI(BB, X86::SHRir32, 2, CountReg).addReg(ByteReg).addZImm(2);
+      }
       break;
     case 1:   // BYTE aligned
     case 3:   // BYTE aligned
-      CountReg = ByteReg;
+      CountReg = getReg(CI.getOperand(3));
       break;
     }
 
@@ -1224,7 +1232,6 @@
     BuildMI(BB, X86::MOVrr32, 1, X86::EDI).addReg(TmpReg1);
     BuildMI(BB, X86::MOVrr32, 1, X86::ESI).addReg(TmpReg2);
 
-    unsigned Bytes = getReg(CI.getOperand(3));
     switch (Align & 3) {
     case 1:   // BYTE aligned
     case 3:   // BYTE aligned