[llvm-commits] CVS: gcc-3.4/gcc/config/mips/mips-protos.h mips.c mips.h
John Criswell
criswell at cs.uiuc.edu
Thu Feb 5 10:09:00 PST 2004
Changes in directory gcc-3.4/gcc/config/mips:
mips-protos.h updated: 1.2 -> 1.3
mips.c updated: 1.2 -> 1.3
mips.h updated: 1.2 -> 1.3
---
Log message:
Commit of merge from September 24, 2003 of mainline GCC. This merge now
works reasonably on Linux/x86 and probably works on Solaris/Sparc.
---
Diffs of the changes: (+72 -51)
Index: gcc-3.4/gcc/config/mips/mips-protos.h
diff -u gcc-3.4/gcc/config/mips/mips-protos.h:1.2 gcc-3.4/gcc/config/mips/mips-protos.h:1.3
--- gcc-3.4/gcc/config/mips/mips-protos.h:1.2 Fri Jan 9 10:54:31 2004
+++ gcc-3.4/gcc/config/mips/mips-protos.h Thu Feb 5 10:05:46 2004
@@ -1,6 +1,6 @@
/* Prototypes of target machine for GNU compiler. MIPS version.
Copyright (C) 1989, 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
- 1999, 2001, 2002 Free Software Foundation, Inc.
+ 1999, 2001, 2002, 2003 Free Software Foundation, Inc.
Contributed by A. Lichnewsky (lich at inria.inria.fr).
Changed by Michael Meissner (meissner at osf.org).
64 bit r4000 support by Ian Lance Taylor (ian at cygnus.com) and
@@ -98,8 +98,8 @@
extern void print_operand (FILE *, rtx, int);
extern void print_operand_address (FILE *, rtx);
extern int mips_output_external (FILE *, tree, const char *);
-#ifdef ASM_OUTPUT_UNDEF_FUNCTION
-extern int mips_output_external_libcall (FILE *, const char *);
+#if TARGET_IRIX5 || TARGET_IRIX6
+extern void mips_output_external_libcall (rtx);
#endif
extern void mips_output_filename (FILE *, const char *);
extern void mips_output_lineno (FILE *, int);
Index: gcc-3.4/gcc/config/mips/mips.c
diff -u gcc-3.4/gcc/config/mips/mips.c:1.2 gcc-3.4/gcc/config/mips/mips.c:1.3
--- gcc-3.4/gcc/config/mips/mips.c:1.2 Fri Jan 9 10:54:31 2004
+++ gcc-3.4/gcc/config/mips/mips.c Thu Feb 5 10:05:46 2004
@@ -1081,7 +1081,7 @@
daddu $at,$at,$gp
and the final address is $at + %got_lo(symbol). */
- return (flag_pic == 1 ? 1 : 3);
+ return (TARGET_XGOT ? 3 : 1);
case SYMBOL_GOT_LOCAL:
/* For o32 and o64, the sequence is:
@@ -1303,6 +1303,28 @@
}
}
+/* Accept a register or the floating point constant 1 in the appropriate mode. */
+
+int
+reg_or_const_float_1_operand (rtx op, enum machine_mode mode)
+{
+ REAL_VALUE_TYPE d;
+
+ switch (GET_CODE (op))
+ {
+ case CONST_DOUBLE:
+ if (mode != GET_MODE (op)
+ || (mode != DFmode && mode != SFmode))
+ return 0;
+
+ REAL_VALUE_FROM_CONST_DOUBLE (d, op);
+ return REAL_VALUES_EQUAL (d, dconst1);
+
+ default:
+ return register_operand (op, mode);
+ }
+}
+
/* Accept the floating point constant 1 in the appropriate mode. */
int
@@ -1881,10 +1903,10 @@
&& GET_CODE (src) == SYMBOL_REF
&& mips_classify_symbol (src) == SYMBOL_GOT_GLOBAL)
{
- if (flag_pic == 1)
- src = mips_load_got16 (src, RELOC_GOT_DISP);
- else
+ if (TARGET_XGOT)
src = mips_load_got32 (temp, src, RELOC_GOT_HI, RELOC_GOT_LO);
+ else
+ src = mips_load_got16 (src, RELOC_GOT_DISP);
emit_insn (gen_rtx_SET (VOIDmode, dest, src));
return;
}
@@ -3213,10 +3235,10 @@
&& GET_CODE (addr) == SYMBOL_REF
&& mips_classify_symbol (addr) == SYMBOL_GOT_GLOBAL)
{
- if (flag_pic == 1)
- addr = mips_load_got16 (addr, RELOC_CALL16);
- else
+ if (TARGET_XGOT)
addr = mips_load_got32 (0, addr, RELOC_CALL_HI, RELOC_CALL_LO);
+ else
+ addr = mips_load_got16 (addr, RELOC_CALL16);
}
addr = force_reg (Pmode, addr);
}
@@ -4632,8 +4654,7 @@
implemented. */
if (TARGET_ABICALLS)
{
- if (flag_pic == 0)
- flag_pic = 1;
+ flag_pic = 1;
if (mips_section_threshold > 0)
warning ("-G is incompatible with PIC code which is the default");
}
@@ -5496,19 +5517,20 @@
return 0;
}
-#ifdef ASM_OUTPUT_UNDEF_FUNCTION
-int
-mips_output_external_libcall (FILE *file ATTRIBUTE_UNUSED, const char *name)
+#if TARGET_IRIX5 || TARGET_IRIX6
+void
+mips_output_external_libcall (rtx fun)
{
register struct extern_list *p;
- p = (struct extern_list *) ggc_alloc (sizeof (struct extern_list));
- p->next = extern_head;
- p->name = name;
- p->size = -1;
- extern_head = p;
-
- return 0;
+ if (mips_abi == ABI_32)
+ {
+ p = (struct extern_list *) ggc_alloc (sizeof (struct extern_list));
+ p->next = extern_head;
+ p->name = XSTR (fun, 0);
+ p->size = -1;
+ extern_head = p;
+ }
}
#endif
@@ -5934,7 +5956,7 @@
if (regno == GP_REG_FIRST + 31
&& mips16_hard_float
&& !mips_entry
- && !aggregate_value_p (return_type)
+ && !aggregate_value_p (return_type, current_function_decl)
&& GET_MODE_CLASS (DECL_MODE (return_type)) == MODE_FLOAT
&& GET_MODE_SIZE (DECL_MODE (return_type)) <= UNITS_PER_FPVALUE)
return true;
@@ -6713,9 +6735,9 @@
REGNO (pic_offset_table_rtx) = cfun->machine->global_pointer;
/* If struct value address is treated as the first argument, make it so. */
- if (aggregate_value_p (DECL_RESULT (fndecl))
+ if (aggregate_value_p (DECL_RESULT (fndecl), fndecl)
&& ! current_function_returns_pcc_struct
- && struct_value_incoming_rtx == 0)
+ && targetm.calls.struct_value_rtx (fndecl, 0) == 0)
{
tree type = build_pointer_type (fntype);
tree function_result_decl = build_decl (PARM_DECL, NULL_TREE, type);
@@ -7180,7 +7202,7 @@
registers. */
if (TARGET_MIPS16
&& mips16_hard_float
- && ! aggregate_value_p (return_type)
+ && ! aggregate_value_p (return_type, current_function_decl)
&& GET_MODE_CLASS (DECL_MODE (return_type)) == MODE_FLOAT
&& GET_MODE_SIZE (DECL_MODE (return_type)) <= UNITS_PER_FPVALUE)
return 0;
Index: gcc-3.4/gcc/config/mips/mips.h
diff -u gcc-3.4/gcc/config/mips/mips.h:1.2 gcc-3.4/gcc/config/mips/mips.h:1.3
--- gcc-3.4/gcc/config/mips/mips.h:1.2 Fri Jan 9 10:54:31 2004
+++ gcc-3.4/gcc/config/mips/mips.h Thu Feb 5 10:05:46 2004
@@ -153,7 +153,7 @@
#define MASK_SOFT_FLOAT 0x00000100 /* software floating point */
#define MASK_FLOAT64 0x00000200 /* fp registers are 64 bits */
#define MASK_ABICALLS 0x00000400 /* emit .abicalls/.cprestore/.cpload */
-#define MASK_UNUSED1 0x00000800 /* Unused Mask. */
+#define MASK_XGOT 0x00000800 /* emit big-got PIC */
#define MASK_LONG_CALLS 0x00001000 /* Always call through a register */
#define MASK_64BIT 0x00002000 /* Use 64 bit GP registers and insns */
#define MASK_EMBEDDED_PIC 0x00004000 /* Generate embedded PIC code */
@@ -218,6 +218,7 @@
/* .abicalls, etc from Pyramid V.4 */
#define TARGET_ABICALLS (target_flags & MASK_ABICALLS)
+#define TARGET_XGOT (target_flags & MASK_XGOT)
/* software floating point */
#define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
@@ -514,9 +515,9 @@
N_("Use GP relative sdata/sbss sections (now ignored)")}, \
{"gpopt", 0, \
N_("Use GP relative sdata/sbss sections (now ignored)")}, \
- {"no-gpOPT", 0, \
+ {"no-gpOPT", 0, \
N_("Don't use GP relative sdata/sbss sections (now ignored)")}, \
- {"no-gpopt", 0, \
+ {"no-gpopt", 0, \
N_("Don't use GP relative sdata/sbss sections (now ignored)")}, \
{"stats", 0, \
N_("Output compiler statistics (now ignored)")}, \
@@ -602,6 +603,10 @@
N_("Generate mips16 code") }, \
{"no-mips16", -MASK_MIPS16, \
N_("Generate normal-mode code") }, \
+ {"xgot", MASK_XGOT, \
+ N_("Lift restrictions on GOT size") }, \
+ {"no-xgot", -MASK_XGOT, \
+ N_("Do not lift restrictions on GOT size") }, \
{"debug", MASK_DEBUG, \
NULL}, \
{"debuga", MASK_DEBUG_A, \
@@ -1082,7 +1087,7 @@
%{membedded-pic} \
%{mabi=32:-32}%{mabi=n32:-n32}%{mabi=64:-64}%{mabi=n64:-64} \
%{mabi=eabi} %{mabi=o64} %{!mabi*: %(asm_abi_default_spec)} \
-%{mgp32} %{mgp64} %{march=*} \
+%{mgp32} %{mgp64} %{march=*} %{mxgot:-xgot} \
%(target_asm_spec) \
%(subtarget_asm_spec)"
@@ -1410,12 +1415,7 @@
on the full register even if a narrower mode is specified. */
#define WORD_REGISTER_OPERATIONS
-/* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
- will either zero-extend or sign-extend. The value of this macro should
- be the code that says which one of the two operations is implicitly
- done, NIL if none.
-
- When in 64 bit mode, mips_move_1word will sign extend SImode and CCmode
+/* When in 64 bit mode, move insns will sign extend SImode and CCmode
moves. All other references are zero extended. */
#define LOAD_EXTEND_OP(MODE) \
(TARGET_64BIT && ((MODE) == SImode || (MODE) == CCmode) \
@@ -1804,31 +1804,31 @@
sub-initializer must be suitable as an initializer for the type
`HARD_REG_SET' which is defined in `hard-reg-set.h'. */
-#define REG_CLASS_CONTENTS \
-{ \
+#define REG_CLASS_CONTENTS \
+{ \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
{ 0x0003000c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* mips16 nonarg regs */\
{ 0x000300fc, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* mips16 registers */ \
{ 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* mips16 T register */ \
{ 0x010300fc, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* mips16 and T regs */ \
{ 0x02000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* SVR4 PIC function address register */ \
- { 0xfdffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* Every other GPR */ \
+ { 0xfdffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* Every other GPR */ \
{ 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* integer registers */ \
{ 0x00000000, 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* floating registers*/ \
{ 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000 }, /* hi register */ \
{ 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000 }, /* lo register */ \
{ 0x00000000, 0x00000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000 }, /* mul/div registers */ \
- { 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000, 0x00000000 }, /* cop0 registers */ \
- { 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000 }, /* cop2 registers */ \
- { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff }, /* cop3 registers */ \
+ { 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000, 0x00000000 }, /* cop0 registers */ \
+ { 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000 }, /* cop2 registers */ \
+ { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff }, /* cop3 registers */ \
{ 0xffffffff, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000 }, /* union classes */ \
{ 0xffffffff, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000 }, \
{ 0x00000000, 0xffffffff, 0x00000001, 0x00000000, 0x00000000, 0x00000000 }, \
- { 0xffffffff, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000, 0x00000000 }, \
- { 0xffffffff, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000 }, \
- { 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff }, \
- { 0x00000000, 0x00000000, 0xffff0000, 0xffffffff, 0xffffffff, 0x0000ffff }, \
- { 0xffffffff, 0x00000000, 0xffff0000, 0xffffffff, 0xffffffff, 0x0000ffff }, \
+ { 0xffffffff, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000, 0x00000000 }, \
+ { 0xffffffff, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000 }, \
+ { 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff }, \
+ { 0x00000000, 0x00000000, 0xffff0000, 0xffffffff, 0xffffffff, 0x0000ffff }, \
+ { 0xffffffff, 0x00000000, 0xffff0000, 0xffffffff, 0xffffffff, 0x0000ffff }, \
{ 0x00000000, 0x00000000, 0x000007f8, 0x00000000, 0x00000000, 0x00000000 }, /* status registers */ \
{ 0xffffffff, 0xffffffff, 0xffff07ff, 0xffffffff, 0xffffffff, 0x0000ffff } /* all registers */ \
}
@@ -2663,9 +2663,7 @@
/* Specify the machine mode that this machine uses
for the index in the tablejump instruction.
- ??? Using HImode in mips16 mode can cause overflow. However, the
- overflow is no more likely than the overflow in a branch
- instruction. Large functions can currently break in both ways. */
+ ??? Using HImode in mips16 mode can cause overflow. */
#define CASE_VECTOR_MODE \
(TARGET_MIPS16 ? HImode : ptr_mode)
@@ -2803,6 +2801,7 @@
{"small_int", { CONST_INT }}, \
{"mips_const_double_ok", { CONST_DOUBLE }}, \
{"const_float_1_operand", { CONST_DOUBLE }}, \
+ {"reg_or_const_float_1_operand", { CONST_DOUBLE, REG}}, \
{"simple_memory_operand", { MEM, SUBREG }}, \
{"equality_op", { EQ, NE }}, \
{"cmp_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \
@@ -3361,7 +3360,7 @@
do { \
if (TARGET_EMBEDDED_PIC || TARGET_MIPS16) \
function_section (current_function_decl); \
- (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
+ (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); \
} while (0)
/* This is how to output an assembler line
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