[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLinearScan.cpp MachineInstr.cpp

[Alkis Evlogimenos]

Changes in directory llvm/lib/CodeGen:

RegAllocLinearScan.cpp updated: 1.39 -> 1.40
MachineInstr.cpp updated: 1.82 -> 1.83

---
Log message:

When an instruction like: A += B had both A and B virtual registers
spilled, A was loaded from its stack location twice. This fixes the bug.


---
Diffs of the changes:  (+24 -10)

Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp
diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.39 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.40
--- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.39	Mon Feb  2 16:00:32 2004
+++ llvm/lib/CodeGen/RegAllocLinearScan.cpp	Mon Feb  2 19:13:06 2004
@@ -470,7 +470,8 @@
             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
                  i != e; ++i) {
                 MachineOperand& op = (*currentInstr_)->getOperand(i);
-                if (op.isVirtualRegister() && op.isUse() && !op.isDef()) {
+                if (op.isVirtualRegister() && op.isUse() &&
+                    !op.isEverDefined(**currentInstr_)) {
                     unsigned virtReg = op.getAllocatedRegNum();
                     unsigned physReg = 0;
                     Virt2PhysMap::const_iterator it = v2pMap_.find(virtReg);
@@ -497,7 +498,9 @@
             for (unsigned i = 0, e = (*currentInstr_)->getNumOperands();
                  i != e; ++i) {
                 MachineOperand& op = (*currentInstr_)->getOperand(i);
-                if (op.isVirtualRegister() && op.isDef()) {
+                if (op.isVirtualRegister()) {
+                    assert(op.isEverDefined(**currentInstr_) &&
+                           "operand should be defined by this instruction");
                     unsigned virtReg = op.getAllocatedRegNum();
                     unsigned physReg = 0;
                     Virt2PhysMap::const_iterator it = v2pMap_.find(virtReg);
@@ -506,14 +509,9 @@
                     }
                     else {
                         physReg = getFreeTempPhysReg(virtReg);
-                    }
-                    if (op.isUse()) { // def and use
-                        loadVirt2PhysReg(virtReg, physReg);
-                    }
-                    else {
                         assignVirt2PhysReg(virtReg, physReg);
+                        tempDefOperands_.push_back(virtReg);
                     }
-                    tempDefOperands_.push_back(virtReg);
                     (*currentInstr_)->SetMachineOperandReg(i, physReg);
                 }
             }
@@ -815,8 +813,6 @@
 
 int RA::getStackSlot(unsigned virtReg)
 {
-    // use lower_bound so that we can do a possibly O(1) insert later
-    // if necessary
     Virt2StackSlotMap::iterator it = v2ssMap_.find(virtReg);
     assert(it != v2ssMap_.end() &&
            "attempt to get stack slot on register that does not live on the stack");


Index: llvm/lib/CodeGen/MachineInstr.cpp
diff -u llvm/lib/CodeGen/MachineInstr.cpp:1.82 llvm/lib/CodeGen/MachineInstr.cpp:1.83
--- llvm/lib/CodeGen/MachineInstr.cpp:1.82	Sun Dec 14 07:24:17 2003
+++ llvm/lib/CodeGen/MachineInstr.cpp	Mon Feb  2 19:13:06 2004
@@ -27,6 +27,24 @@
 //
 extern const TargetInstrDescriptor *TargetInstrDescriptors;
 
+bool MachineOperand::isEverUsed(const MachineInstr& mi) const
+{
+    for (int i = 0, e = mi.getNumOperands(); i != e; ++i) {
+        if (*this == mi.getOperand(i) && mi.getOperand(i).isUse())
+            return true;
+    }
+    return false;
+}
+
+bool MachineOperand::isEverDefined(const MachineInstr& mi) const
+{
+    for (int i = 0, e = mi.getNumOperands(); i != e; ++i) {
+        if (*this == mi.getOperand(i) && mi.getOperand(i).isDef())
+            return true;
+    }
+    return false;
+}
+
 // Constructor for instructions with variable #operands
 MachineInstr::MachineInstr(MachineOpCode OpCode, unsigned  numOperands)
   : opCode(OpCode),