[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcInstrSelection.cpp SparcJITInfo.h SparcTargetMachine.cpp SparcTargetMachine.h
Chris Lattner
lattner at cs.uiuc.edu
Sun Dec 28 03:47:01 PST 2003
Changes in directory llvm/lib/Target/Sparc:
SparcInstrSelection.cpp updated: 1.128 -> 1.129
SparcJITInfo.h updated: 1.1 -> 1.2
SparcTargetMachine.cpp updated: 1.95 -> 1.96
SparcTargetMachine.h updated: 1.2 -> 1.3
---
Log message:
Eliminate some code that is not needed now that we have the intrinsic lowering pass
---
Diffs of the changes: (+30 -58)
Index: llvm/lib/Target/Sparc/SparcInstrSelection.cpp
diff -u llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.128 llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.129
--- llvm/lib/Target/Sparc/SparcInstrSelection.cpp:1.128 Wed Dec 17 16:04:00 2003
+++ llvm/lib/Target/Sparc/SparcInstrSelection.cpp Sun Dec 28 03:46:33 2003
@@ -1393,11 +1393,12 @@
// instead of a regular call. If not that kind of intrinsic, do nothing.
// Returns true if code was generated, otherwise false.
//
-bool CodeGenIntrinsic(Intrinsic::ID iid, CallInst &callInstr,
- TargetMachine &target,
- std::vector<MachineInstr*>& mvec)
-{
+static bool CodeGenIntrinsic(Intrinsic::ID iid, CallInst &callInstr,
+ TargetMachine &target,
+ std::vector<MachineInstr*>& mvec) {
switch (iid) {
+ default:
+ assert(0 && "Unknown intrinsic function call should have been lowered!");
case Intrinsic::va_start: {
// Get the address of the first incoming vararg argument on the stack
bool ignore;
@@ -1422,47 +1423,6 @@
addReg(callInstr.getOperand(1)).
addRegDef(&callInstr));
return true;
-
- case Intrinsic::sigsetjmp:
- case Intrinsic::setjmp: {
- // act as if we return 0
- unsigned g0 = target.getRegInfo().getZeroRegNum();
- mvec.push_back(BuildMI(V9::ORr,3).addMReg(g0).addMReg(g0)
- .addReg(&callInstr, MOTy::Def));
- return true;
- }
-
- case Intrinsic::siglongjmp:
- case Intrinsic::longjmp: {
- // call abort()
- Module* M = callInstr.getParent()->getParent()->getParent();
- const FunctionType *voidvoidFuncTy =
- FunctionType::get(Type::VoidTy, std::vector<const Type*>(), false);
- Function *F = M->getOrInsertFunction("abort", voidvoidFuncTy);
- assert(F && "Unable to get or create `abort' function declaration");
-
- // Create hidden virtual register for return address with type void*
- TmpInstruction* retAddrReg =
- new TmpInstruction(MachineCodeForInstruction::get(&callInstr),
- PointerType::get(Type::VoidTy), &callInstr);
-
- // Use a descriptor to pass information about call arguments
- // to the register allocator. This descriptor will be "owned"
- // and freed automatically when the MachineCodeForInstruction
- // object for the callInstr goes away.
- CallArgsDescriptor* argDesc =
- new CallArgsDescriptor(&callInstr, retAddrReg, false, false);
-
- MachineInstr* callMI = BuildMI(V9::CALL, 1).addPCDisp(F);
- callMI->addImplicitRef(retAddrReg, /*isDef*/ true);
-
- mvec.push_back(callMI);
- mvec.push_back(BuildMI(V9::NOP, 0));
- return true;
- }
-
- default:
- return false;
}
}
Index: llvm/lib/Target/Sparc/SparcJITInfo.h
diff -u llvm/lib/Target/Sparc/SparcJITInfo.h:1.1 llvm/lib/Target/Sparc/SparcJITInfo.h:1.2
--- llvm/lib/Target/Sparc/SparcJITInfo.h:1.1 Fri Dec 19 19:21:59 2003
+++ llvm/lib/Target/Sparc/SparcJITInfo.h Sun Dec 28 03:46:33 2003
@@ -18,10 +18,13 @@
namespace llvm {
class TargetMachine;
+ class IntrinsicLowering;
+
class SparcJITInfo : public TargetJITInfo {
TargetMachine &TM;
+ IntrinsicLowering &IL;
public:
- SparcJITInfo(TargetMachine &tm) : TM(tm) {}
+ SparcJITInfo(TargetMachine &tm, IntrinsicLowering &il) : TM(tm), IL(il) {}
/// addPassesToJITCompile - Add passes to the specified pass manager to
/// implement a fast dynamic compiler for this target. Return true if this
Index: llvm/lib/Target/Sparc/SparcTargetMachine.cpp
diff -u llvm/lib/Target/Sparc/SparcTargetMachine.cpp:1.95 llvm/lib/Target/Sparc/SparcTargetMachine.cpp:1.96
--- llvm/lib/Target/Sparc/SparcTargetMachine.cpp:1.95 Sun Dec 21 21:47:58 2003
+++ llvm/lib/Target/Sparc/SparcTargetMachine.cpp Sun Dec 28 03:46:33 2003
@@ -14,6 +14,7 @@
//===----------------------------------------------------------------------===//
#include "llvm/Function.h"
+#include "llvm/IntrinsicLowering.h"
#include "llvm/PassManager.h"
#include "llvm/Assembly/PrintModulePass.h"
#include "llvm/CodeGen/InstrSelection.h"
@@ -114,13 +115,18 @@
}
-SparcTargetMachine::SparcTargetMachine()
+SparcTargetMachine::SparcTargetMachine(IntrinsicLowering *il)
: TargetMachine("UltraSparc-Native", false),
+ IL(il ? il : new DefaultIntrinsicLowering()),
schedInfo(*this),
regInfo(*this),
frameInfo(*this),
cacheInfo(*this),
- jitInfo(*this) {
+ jitInfo(*this, *IL) {
+}
+
+SparcTargetMachine::~SparcTargetMachine() {
+ delete IL;
}
// addPassesToEmitAssembly - This method controls the entire code generation
@@ -165,7 +171,7 @@
PM.add(new PrintFunctionPass("Input code to instr. selection:\n",
&std::cerr));
- PM.add(createInstructionSelectionPass(*this));
+ PM.add(createInstructionSelectionPass(*this, *IL));
if (!DisableSched)
PM.add(createInstructionSchedulingWithSSAPass(*this));
@@ -187,7 +193,7 @@
// function has been emitted.
//
PM.add(createAsmPrinterPass(Out, *this));
- PM.add(createSparcMachineCodeDestructionPass()); // Free stuff no longer needed
+ PM.add(createSparcMachineCodeDestructionPass()); // Free mem no longer needed
// Emit bytecode to the assembly file into its special section next
if (EmitMappingInfo)
@@ -232,7 +238,7 @@
//PM.add(createLICMPass());
//PM.add(createGCSEPass());
- PM.add(createInstructionSelectionPass(TM));
+ PM.add(createInstructionSelectionPass(TM, IL));
PM.add(getRegisterAllocator(TM));
PM.add(createPrologEpilogInsertionPass());
@@ -246,6 +252,7 @@
// that implements the Sparc backend. (the llvm/CodeGen/Sparc.h interface)
//----------------------------------------------------------------------------
-TargetMachine *llvm::allocateSparcTargetMachine(const Module &M) {
- return new SparcTargetMachine();
+TargetMachine *llvm::allocateSparcTargetMachine(const Module &M,
+ IntrinsicLowering *IL) {
+ return new SparcTargetMachine(IL);
}
Index: llvm/lib/Target/Sparc/SparcTargetMachine.h
diff -u llvm/lib/Target/Sparc/SparcTargetMachine.h:1.2 llvm/lib/Target/Sparc/SparcTargetMachine.h:1.3
--- llvm/lib/Target/Sparc/SparcTargetMachine.h:1.2 Fri Dec 19 19:21:59 2003
+++ llvm/lib/Target/Sparc/SparcTargetMachine.h Sun Dec 28 03:46:33 2003
@@ -7,15 +7,13 @@
//
//===----------------------------------------------------------------------===//
//
-// This file declares the primary interface to machine description for the
-// UltraSPARC.
+// This file declares the top-level UltraSPARC target machine.
//
//===----------------------------------------------------------------------===//
#ifndef SPARC_TARGETMACHINE_H
#define SPARC_TARGETMACHINE_H
-#include "llvm/PassManager.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "SparcInstrInfo.h"
@@ -25,8 +23,11 @@
#include "SparcJITInfo.h"
namespace llvm {
+ class PassManager;
+ class IntrinsicLowering;
class SparcTargetMachine : public TargetMachine {
+ IntrinsicLowering *IL;
SparcInstrInfo instrInfo;
SparcSchedInfo schedInfo;
SparcRegInfo regInfo;
@@ -34,8 +35,9 @@
SparcCacheInfo cacheInfo;
SparcJITInfo jitInfo;
public:
- SparcTargetMachine();
-
+ SparcTargetMachine(IntrinsicLowering *IL);
+ ~SparcTargetMachine();
+
virtual const TargetInstrInfo &getInstrInfo() const { return instrInfo; }
virtual const TargetSchedInfo &getSchedInfo() const { return schedInfo; }
virtual const TargetRegInfo &getRegInfo() const { return regInfo; }
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