[llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp LiveRangeInfo.cpp

[Alkis Evlogimenos]

Changes in directory llvm/lib/CodeGen/RegAlloc:

PhyRegAlloc.cpp updated: 1.130 -> 1.131
LiveRangeInfo.cpp updated: 1.47 -> 1.48

---
Log message:

Change interface of MachineOperand as follows:

    a) remove opIsUse(), opIsDefOnly(), opIsDefAndUse()
    b) add isUse(), isDef()
    c) rename opHiBits32() to isHiBits32(),
              opLoBits32() to isLoBits32(),
              opHiBits64() to isHiBits64(),
              opLoBits64() to isLoBits64().

This results to much more readable code, for example compare
"op.opIsDef() || op.opIsDefAndUse()" to "op.isDef()" a pattern used
very often in the code.


---
Diffs of the changes:  (+10 -12)

Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.130 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.131
--- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.130	Tue Nov 11 16:41:33 2003
+++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp	Sun Dec 14 07:24:15 2003
@@ -250,7 +250,7 @@
       // iterate over all MI operands to find defs
       for (MachineInstr::const_val_op_iterator OpI = MInst->begin(),
              OpE = MInst->end(); OpI != OpE; ++OpI) {
-       	if (OpI.isDefOnly() || OpI.isDefAndUse()) // create a new LR since def
+       	if (OpI.isDef()) // create a new LR since def
 	  addInterference(*OpI, &LVSetAI, isCallInst);
 
 	// Calculate the spill cost of each live range
@@ -269,8 +269,7 @@
       // instr (currently, only calls have this).
       unsigned NumOfImpRefs =  MInst->getNumImplicitRefs();
       for (unsigned z=0; z < NumOfImpRefs; z++) 
-        if (MInst->getImplicitOp(z).opIsDefOnly() ||
-	    MInst->getImplicitOp(z).opIsDefAndUse())
+        if (MInst->getImplicitOp(z).isDef())
 	  addInterference( MInst->getImplicitRef(z), &LVSetAI, isCallInst );
 
     } // for all machine instructions in BB
@@ -295,7 +294,7 @@
   for (MachineInstr::const_val_op_iterator It1 = MInst->begin(),
          ItE = MInst->end(); It1 != ItE; ++It1) {
     const LiveRange *LROfOp1 = LRI->getLiveRangeForValue(*It1); 
-    assert((LROfOp1 || !It1.isUseOnly())&&"No LR for Def in PSEUDO insruction");
+    assert((LROfOp1 || It1.isDef()) && "No LR for Def in PSEUDO insruction");
 
     MachineInstr::const_val_op_iterator It2 = It1;
     for (++It2; It2 != ItE; ++It2) {
@@ -645,8 +644,8 @@
 	 "Return value of a ret must be handled elsewhere");
 
   MachineOperand& Op = MInst->getOperand(OpNum);
-  bool isDef =  Op.opIsDefOnly();
-  bool isDefAndUse = Op.opIsDefAndUse();
+  bool isDef =  Op.isDef();
+  bool isUse = Op.isUse();
   unsigned RegType = MRI.getRegTypeForLR(LR);
   int SpillOff = LR->getSpillOffFromFP();
   RegClass *RC = LR->getRegClass();
@@ -699,7 +698,7 @@
       assert(scratchReg != MRI.getInvalidRegNum());
     }
   
-  if (!isDef || isDefAndUse) {
+  if (isUse) {
     // for a USE, we have to load the value of LR from stack to a TmpReg
     // and use the TmpReg as one operand of instruction
     
@@ -712,7 +711,7 @@
     AdIMid.clear();
   }
   
-  if (isDef || isDefAndUse) {   // if this is a Def
+  if (isDef) {   // if this is a Def
     // for a DEF, we have to store the value produced by this instruction
     // on the stack position allocated for this LR
     


Index: llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp
diff -u llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.47 llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.48
--- llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp:1.47	Tue Nov 11 16:41:33 2003
+++ llvm/lib/CodeGen/RegAlloc/LiveRangeInfo.cpp	Sun Dec 14 07:24:15 2003
@@ -184,7 +184,7 @@
       // for each operand that is defined by the instruction
       for (MachineInstr::val_op_iterator OpI = MInst->begin(),
              OpE = MInst->end(); OpI != OpE; ++OpI)
-	if (OpI.isDefOnly() || OpI.isDefAndUse()) {     
+	if (OpI.isDef()) {     
 	  const Value *Def = *OpI;
           bool isCC = (OpI.getMachineOperand().getType()
                        == MachineOperand::MO_CCRegister);
@@ -203,8 +203,7 @@
       // iterate over implicit MI operands and create a new LR
       // for each operand that is defined by the instruction
       for (unsigned i = 0; i < MInst->getNumImplicitRefs(); ++i) 
-	if (MInst->getImplicitOp(i).opIsDefOnly() ||
-            MInst->getImplicitOp(i).opIsDefAndUse()) {     
+	if (MInst->getImplicitOp(i).isDef()) {
 	  const Value *Def = MInst->getImplicitRef(i);
           LiveRange* LR = createOrAddToLiveRange(Def, /*isCC*/ false);
 
@@ -342,7 +341,7 @@
       // iterate over  MI operands to find defs
       for(MachineInstr::const_val_op_iterator DefI = MI->begin(),
             DefE = MI->end(); DefI != DefE; ++DefI) {
-	if (DefI.isDefOnly() || DefI.isDefAndUse()) { // this operand is modified
+	if (DefI.isDef()) { // this operand is modified
 	  LiveRange *LROfDef = getLiveRangeForValue( *DefI );
 	  RegClass *RCOfDef = LROfDef->getRegClass();