[llvm-commits] CVS: llvm/lib/Target/X86/Makefile

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

Makefile updated: 1.14 -> 1.15

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Log message:

Hopefully fix the objdir != srcdir issue


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Diffs of the changes:  (+12 -6)

Index: llvm/lib/Target/X86/Makefile
diff -u llvm/lib/Target/X86/Makefile:1.14 llvm/lib/Target/X86/Makefile:1.15
--- llvm/lib/Target/X86/Makefile:1.14	Wed Nov  5 00:43:36 2003
+++ llvm/lib/Target/X86/Makefile	Thu Nov  6 18:34:33 2003
@@ -15,27 +15,33 @@
                  X86GenRegisterInfo.inc X86GenInstrNames.inc \
                  X86GenInstrInfo.inc X86GenInstrSelector.inc
 
-X86GenRegisterNames.inc::  X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
+X86GenRegisterNames.inc::  $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \
+                           $(SourceDir)/../Target.td $(TBLGEN)
 	@echo "Building X86.td register names with tblgen"
 	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-enums -o $@
 
-X86GenRegisterInfo.h.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
+X86GenRegisterInfo.h.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \
+                           $(SourceDir)/../Target.td $(TBLGEN)
 	@echo "Building X86.td register information header with tblgen"
 	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc-header -o $@
 
-X86GenRegisterInfo.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
+X86GenRegisterInfo.inc:: $(SourceDir)/X86.td $(SourceDir)/X86RegisterInfo.td \
+                         $(SourceDir)/../Target.td $(TBLGEN)
 	@echo "Building X86.td register information implementation with tblgen"
 	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-register-desc -o $@
 
-X86GenInstrNames.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
+X86GenInstrNames.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
+                       $(SourceDir)/../Target.td $(TBLGEN)
 	@echo "Building X86.td instruction names with tblgen"
 	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-enums -o $@
 
-X86GenInstrInfo.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
+X86GenInstrInfo.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
+                      $(SourceDir)/../Target.td $(TBLGEN)
 	@echo "Building X86.td instruction information with tblgen"
 	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-desc -o $@
 
-X86GenInstrSelector.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
+X86GenInstrSelector.inc:: $(SourceDir)/X86.td $(SourceDir)/X86InstrInfo.td \
+                          $(SourceDir)/../Target.td $(TBLGEN)
 	@echo "Building X86.td instruction selector with tblgen"
 	$(VERB) $(TBLGEN) -I $(BUILD_SRC_DIR) $< -gen-instr-selector -o $@