[llvm-commits] [regalloc_linearscan] CVS: llvm/lib/CodeGen/RegAllocLinearScan.cpp

[Alkis Evlogimenos]

Changes in directory llvm/lib/CodeGen:

RegAllocLinearScan.cpp updated: 1.1.2.8 -> 1.1.2.9

---
Log message:

Improved debugging output.


---
Diffs of the changes:  (+25 -23)

Index: llvm/lib/CodeGen/RegAllocLinearScan.cpp
diff -u llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.1.2.8 llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.1.2.9
--- llvm/lib/CodeGen/RegAllocLinearScan.cpp:1.1.2.8	Thu Nov  6 03:47:43 2003
+++ llvm/lib/CodeGen/RegAllocLinearScan.cpp	Thu Nov  6 03:59:26 2003
@@ -34,6 +34,9 @@
     Statistic<> numReloaded("ra-linearscan", "Number of registers reloaded");
 
     class RA : public MachineFunctionPass {
+    public:
+        typedef std::vector<LiveIntervals::Interval*> IntervalPtrs;
+
     private:
         MachineFunction* mf_;
         const TargetMachine* tm_;
@@ -44,7 +47,6 @@
         typedef LiveIntervals::Intervals Intervals;
         Intervals* li_;
 
-        typedef std::vector<LiveIntervals::Interval*> IntervalPtrs;
         IntervalPtrs active_, inactive_;
 
         typedef LiveIntervals::MiIndex2MbbMap MiIndex2MbbMap;
@@ -135,6 +137,17 @@
     };
 }
 
+namespace {
+    void printIntervals(const char* const str,
+                        RA::IntervalPtrs::const_iterator i,
+                        RA::IntervalPtrs::const_iterator e) {
+        if (str) std::cerr << str << " intervals:\n";
+        for (; i != e; ++i) {
+            std::cerr << "\t\t" << **i << '\n';
+        }
+    }
+}
+
 bool RA::runOnMachineFunction(MachineFunction &fn) {
     mf_ = &fn;
     tm_ = &fn.getTarget();
@@ -159,19 +172,8 @@
         assert(currentInstr_ >= currentMbb_->begin() &&
                currentInstr_ < currentMbb_->end() &&
                "current instruction/machine basic block mismatch");
-        DEBUG(
-            std::cerr << "active intervals:\n";
-            for (IntervalPtrs::const_iterator
-                     i = active_.begin(), e = active_.end(); i != e; ++i) {
-                std::cerr << '\t' << **i << '\n';
-            }
-            std::cerr << "inactive intervals:\n";
-            for (IntervalPtrs::const_iterator
-                     i = inactive_.begin(), e = inactive_.end(); i != e; ++i) {
-                std::cerr << '\t' << **i << '\n';
-            }
-            );
-
+        DEBUG(printIntervals("\tactive", active_.begin(), active_.end()));
+        DEBUG(printIntervals("\tinactive", inactive_.begin(), inactive_.end()));
 
         processActiveIntervals(i);
         processInactiveIntervals(i);
@@ -190,19 +192,19 @@
 
 void RA::processActiveIntervals(Intervals::iterator cur)
 {
-    DEBUG(std::cerr << "\tprocessing active intervals:\n");
+    DEBUG(std::cerr << "\t\tprocessing active intervals:\n");
     unsigned curInstrIndex = cur->start();
     for (IntervalPtrs::iterator i = active_.begin(); i != active_.end();) {
         unsigned virtReg = (*i)->reg;
         // remove expired intervals
         if ((*i)->expired(curInstrIndex)) {
-            DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
+            DEBUG(std::cerr << "\t\t\tinterval " << **i << " expired\n");
             freeReg(virtReg);
             // remove interval from active
             i = active_.erase(i);
         }
         else if (!(*i)->overlaps(curInstrIndex)) {
-            DEBUG(std::cerr << "\t\tinterval " << **i << " inactive\n");
+            DEBUG(std::cerr << "\t\t\tinterval " << **i << " inactive\n");
             unmarkReg(virtReg);
             // add interval to inactive
             inactive_.push_back(*i);
@@ -217,18 +219,18 @@
 
 void RA::processInactiveIntervals(Intervals::iterator cur)
 {
-    DEBUG(std::cerr << "\tprocessing inactive intervals:\n");
+    DEBUG(std::cerr << "\t\tprocessing inactive intervals:\n");
     unsigned curInstrIndex = cur->start();
     for (IntervalPtrs::iterator i = inactive_.begin(); i != inactive_.end();) {
         unsigned virtReg = (*i)->reg;
         if ((*i)->expired(curInstrIndex)) {
-            DEBUG(std::cerr << "\t\tinterval " << **i << " expired\n");
+            DEBUG(std::cerr << "\t\t\tinterval " << **i << " expired\n");
             freeReg(virtReg);
             // remove from inactive
             i = inactive_.erase(i);
         }
         else if ((*i)->overlaps(curInstrIndex)) {
-            DEBUG(std::cerr << "\t\tinterval " << **i << " active\n");
+            DEBUG(std::cerr << "\t\t\tinterval " << **i << " active\n");
             markReg(virtReg);
             // add to active
             active_.push_back(*i);
@@ -243,7 +245,7 @@
 
 void RA::spillAtInterval(Intervals::iterator cur)
 {
-    DEBUG(std::cerr << "\tspilling at interval " << *cur << ":\n");
+    DEBUG(std::cerr << "\t\tspilling at interval " << *cur << ":\n");
     assert(!active_.empty() &&
            "active set cannot be empty when choosing a register to spill");
     IntervalPtrs::iterator lastEnd = active_.begin();
@@ -262,7 +264,7 @@
         }
     }
 
-    DEBUG(std::cerr << "\t\tspilling interval " << **lastEnd << "\n");
+    DEBUG(std::cerr << "\t\t\tspilling interval " << **lastEnd << "\n");
     // spill last in active and inactive
     spillVirtReg((*lastEnd)->reg);
     freeReg((*lastEnd)->reg);
@@ -292,7 +294,7 @@
 
 unsigned RA::getFreeReg(unsigned virtReg)
 {
-    DEBUG(std::cerr << "\tgetting free register: ");
+    DEBUG(std::cerr << "\t\tgetting free register: ");
     const TargetRegisterClass* rc = mf_->getSSARegMap()->getRegClass(virtReg);
     TargetRegisterClass::iterator reg = rc->allocation_order_begin(*mf_);
     TargetRegisterClass::iterator regEnd = rc->allocation_order_end(*mf_);