[llvm-commits] CVS: llvm-www/www-index.html
Vikram Adve
vadve at cs.uiuc.edu
Fri Oct 24 10:42:00 PDT 2003
Changes in directory llvm-www:
www-index.html updated: 1.63 -> 1.64
---
Log message:
Edited home page before release. Main changes are: funding, current
projects, and updated the note about which overview document to read.
---
Diffs of the changes: (+56 -40)
Index: llvm-www/www-index.html
diff -u llvm-www/www-index.html:1.63 llvm-www/www-index.html:1.64
--- llvm-www/www-index.html:1.63 Tue Oct 21 15:28:17 2003
+++ llvm-www/www-index.html Fri Oct 24 10:41:29 2003
@@ -32,13 +32,15 @@
program. LLVM supports effective optimization at
compile time, link-time (particularly interprocedural),
run-time and offline (i.e., after software is
- installed), while maintaining compatibility with
+ installed), while remaining transparent to developers
+ and maintaining compatibility with
existing build scripts.<p></li>
<li><a href="docs/LangRef.html"><u>A virtual
instruction set</u></a> - LLVM is a low-level object
code representation that uses simple RISC-like
- instructions, but provides high-level type and dataflow
+ instructions, but provides rich (but
+ language-independent) type and dataflow
(SSA) information about operands. This combination
enables sophisticated transformations on object code,
while remaining light-weight enough to be attached to
@@ -163,8 +165,8 @@
<tr>
<td>
We are working towards a public release of the LLVM
- infrastructure, and hope to have a distribution available the
- first week of October 2003. We expect to include a C front-end, beta
+ infrastructure, and hope to have a distribution available in
+ October 2003. We expect to include a C front-end, a
C++ front-end, Sparc and X86 code generators (in both Static and
JIT forms), and a mid-level optimizer in this release. This
release will be covered under the <a
@@ -192,8 +194,8 @@
Software Program (grant #EIA-0103756), the NSF Operating Systems
and Compilers program (grant #CCR-9988482), by the NSF Embedded
Systems Program (grant #CCR-0209202), and by the MARCO/DARPA <a
- href="http://www.c2s2.org">Center for Circuits, Systems and
- Software</a> (C2S2).<p><p>
+ href="http://www.gigascale.org/">Gigascale Systems Research
+ Center</a> (GSRC).<p><p>
</td>
</tr>
</table>
@@ -269,12 +271,12 @@
<font size=+1><b>LLVM Design:</b></font>
<ul>
- <li><a href="pubs/2002-08-09-LLVMCompilationStrategy.html">
- The LLVM Instruction Set and Compilation Strategy</a>
- - Describes the high level picture of the LLVM instruction
- set and compilation system. This should be the first
- document you read to get an overview of LLVM. </li>
-
+ <li><a href="pubs/2003-09-30-LifelongOptimizationTR.html">
+ LLVM: A Compilation Framework for Lifelong Program
+ Analysis & Transformation</a>:
+ - Describes the LLVM instruction set and compilation
+ strategy. This should be the first document you read to
+ get an overview of LLVM. </li>
<li><a href="docs/LangRef.html">LLVM Reference Manual</a>
- Defines the LLVM
intermediate representation, the assembly
@@ -382,34 +384,48 @@
<tr>
<td>
The LLVM infrastructure underlies many ongoing
- research projects in our group. Here are some of
- the projects currently active:<ul>
- <li><em><strong>Macroscopic data structure
- analysis and transformations</strong>:</em>
- Analyzing and optimizing entire linked
- data structures, including logical data
- structure graphs, automatic pool
- allocation for individual heap-based data
- structures, and transparent pointer
- compression. </li>
- <li><em><strong>Runtime optimization on
- general-purpose processors</strong>:</em>
- Optimizing native code during
- execution, using LLVM-to-native-code
- mapping information. </li>
- <li><em><strong><a href="safecode/">SAFECode</a>
- project
- </strong>:</em> Language and
- compiler support for ensuring memory
- safety of embedded code through static
- analysis.</li>
- <li><em><strong>Virtual Processor
- Architectures</strong>:</em> Using a
- virtual instruction set (such as a
- variant of LLVM) to hide hardware
- processor architectures (or architectural
- components) from user-level code.</li>
- </ul><p>
+ research projects in our group. Some key additional
+ components of the system that are being developed in these
+ projects include:
+ <li><em><strong>Automatic Pool Allocation</strong>:</em>:
+ A fully automatic program transformation that introduces
+ <i>region-based memory management</i> in a novel manner:
+ it partitions the heap into separate regions for distinct
+ instances of logical data structures (such as a tree or
+ a hash table). This transformation can enable better
+ compiler-based memory management for program data structures.
+ </li>
+ <li><em><strong>A Software Scheme for Online
+ Tracing</strong>:</em> We have developed a tracing scheme that
+ identifies frequently executed program paths at runtime,
+ and optionally extracts these paths into a software-managed
+ trace cache. This technique uses an offline LLVM
+ transformation, plus a runtime instrumentation library
+ that currently only works for Sparc code. A key novel aspect
+ of our approach is that our scheme generates both native code
+ traces and the corresponding traces of LLVM code.
+ </li>
+ <li><em><strong>Transparent runtime optimization on
+ general-purpose processors</strong>:</em>
+ We are developing a transparent trace-based runtime
+ optimization system that operates on LLVM traces at runtime,
+ using the software tracing mechanism and trace cache above.
+ </li>
+ Other research projects in our group based on LLVM include:
+ <td>
+ <li><em><strong><a href="safecode/">SAFECode</a></strong>:</em>
+ SAFECode is a compiler-based system for enforcing program
+ safety, which informally means that an untrusted code segment
+ or module will not corrupt the memory state of its host
+ process. SAFECode uses a type-safe subset of LLVM as its code
+ representation, and is able to enforce memory safety for a
+ type-safe C programs <i>without requiring garbage
+ collection.</i>
+ </li>
+ <li><em><strong>Virtual Processor Architectures</strong>:</em>
+ Using a virtual instruction set (such as a variant of LLVM) to
+ hide hardware processor architectures (or architectural
+ components) from user-level code.</li> </ul><p>
</td>
</tr>
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