[llvm-commits] CVS: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp PhyRegAlloc.h

[Chris Lattner]

Changes in directory llvm/lib/CodeGen/RegAlloc:

PhyRegAlloc.cpp updated: 1.113 -> 1.114
PhyRegAlloc.h updated: 1.52 -> 1.53

---
Log message:

Move getAnalysisUsage method from header to .cpp file.  Add a normal file
header comment


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp
diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.113 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.114
--- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp:1.113	Sat Sep 20 22:57:37 2003
+++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp	Tue Sep 23 10:13:04 2003
@@ -43,6 +43,12 @@
   return new PhyRegAlloc (T);
 }
 
+void PhyRegAlloc::getAnalysisUsage(AnalysisUsage &AU) const {
+  AU.addRequired<LoopInfo> ();
+  AU.addRequired<FunctionLiveVarInfo> ();
+}
+
+
 
 //----------------------------------------------------------------------------
 // This method initially creates interference graphs (one in each reg class)


Index: llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h
diff -u llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h:1.52 llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h:1.53
--- llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h:1.52	Sat Sep 20 21:51:00 2003
+++ llvm/lib/CodeGen/RegAlloc/PhyRegAlloc.h	Tue Sep 23 10:13:04 2003
@@ -1,20 +1,18 @@
-/* Title:   PhyRegAlloc.h   -*- C++ -*-
-   Author:  Ruchira Sasanka
-   Date:    Aug 20, 01
-   Purpose: This is the main entry point for register allocation.
-
-   Notes:
-   =====
-
- * RegisterClasses: Each RegClass accepts a 
-   TargetRegClass which contains machine specific info about that register
-   class. The code in the RegClass is machine independent and they use
-   access functions in the TargetRegClass object passed into it to get
-   machine specific info.
-
- * Machine dependent work: All parts of the register coloring algorithm
-   except coloring of an individual node are machine independent.
-*/ 
+//===-- PhyRegAlloc.h - Graph Coloring Register Allocator -------*- c++ -*-===//
+//   
+// This is the main entry point for register allocation.
+//
+// Notes:
+// * RegisterClasses: Each RegClass accepts a 
+//   TargetRegClass which contains machine specific info about that register
+//   class. The code in the RegClass is machine independent and they use
+//   access functions in the TargetRegClass object passed into it to get
+//   machine specific info.
+//
+// * Machine dependent work: All parts of the register coloring algorithm
+//   except coloring of an individual node are machine independent.
+//
+//===----------------------------------------------------------------------===//
 
 #ifndef PHYREGALLOC_H
 #define PHYREGALLOC_H
@@ -91,10 +89,7 @@
   ///
   virtual bool runOnFunction (Function &F);
 
-  virtual void getAnalysisUsage (AnalysisUsage &AU) const {
-    AU.addRequired<LoopInfo> ();
-    AU.addRequired<FunctionLiveVarInfo> ();
-  }
+  virtual void getAnalysisUsage (AnalysisUsage &AU) const;
 
   const char *getPassName () const {
     return "Traditional graph-coloring reg. allocator";