[llvm-commits] CVS: llvm/lib/Target/Sparc/Sparc.cpp SparcInternals.h SparcOptInfo.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/Sparc:

Sparc.cpp updated: 1.79 -> 1.80
SparcInternals.h updated: 1.99 -> 1.100
SparcOptInfo.cpp updated: 1.9 -> 1.10

---
Log message:

No longer provide an optinfo, noone uses it


---
Diffs of the changes:

Index: llvm/lib/Target/Sparc/Sparc.cpp
diff -u llvm/lib/Target/Sparc/Sparc.cpp:1.79 llvm/lib/Target/Sparc/Sparc.cpp:1.80
--- llvm/lib/Target/Sparc/Sparc.cpp:1.79	Mon Sep  1 15:33:07 2003
+++ llvm/lib/Target/Sparc/Sparc.cpp	Mon Sep  1 15:40:59 2003
@@ -139,8 +139,7 @@
     schedInfo(*this),
     regInfo(*this),
     frameInfo(*this),
-    cacheInfo(*this),
-    optInfo(*this) {
+    cacheInfo(*this) {
 }
 
 


Index: llvm/lib/Target/Sparc/SparcInternals.h
diff -u llvm/lib/Target/Sparc/SparcInternals.h:1.99 llvm/lib/Target/Sparc/SparcInternals.h:1.100
--- llvm/lib/Target/Sparc/SparcInternals.h:1.99	Mon Sep  1 15:33:07 2003
+++ llvm/lib/Target/Sparc/SparcInternals.h	Mon Sep  1 15:40:59 2003
@@ -14,7 +14,6 @@
 #include "llvm/Target/TargetFrameInfo.h"
 #include "llvm/Target/TargetCacheInfo.h"
 #include "llvm/Target/TargetRegInfo.h"
-#include "llvm/Target/TargetOptInfo.h"
 #include "llvm/Type.h"
 #include "SparcRegClassInfo.h"
 #include "Config/sys/types.h"
@@ -631,19 +630,6 @@
 };
 
 
-//---------------------------------------------------------------------------
-// class UltraSparcOptInfo 
-// 
-// Purpose:
-//   Interface to machine-level optimization routines for the UltraSPARC.
-//---------------------------------------------------------------------------
-
-struct UltraSparcOptInfo: public TargetOptInfo {
-  UltraSparcOptInfo(const TargetMachine &T) : TargetOptInfo(T) {} 
-
-  virtual bool IsUselessCopy    (const MachineInstr* MI) const;
-};
-
 /// createAddRegNumToValuesPass - this pass adds unsigned register numbers to
 /// instructions, since that's not done by the Sparc InstSelector, but that's
 /// how the target-independent register allocator in the JIT likes to see
@@ -678,7 +664,6 @@
   UltraSparcRegInfo   regInfo;
   UltraSparcFrameInfo frameInfo;
   UltraSparcCacheInfo cacheInfo;
-  UltraSparcOptInfo   optInfo;
 public:
   UltraSparc();
 
@@ -687,7 +672,6 @@
   virtual const TargetRegInfo    &getRegInfo()   const { return regInfo; }
   virtual const TargetFrameInfo  &getFrameInfo() const { return frameInfo; }
   virtual const TargetCacheInfo  &getCacheInfo() const { return cacheInfo; }
-  virtual const TargetOptInfo    &getOptInfo()   const { return optInfo; }
 
   virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out);
   virtual bool addPassesToJITCompile(FunctionPassManager &PM);


Index: llvm/lib/Target/Sparc/SparcOptInfo.cpp
diff -u llvm/lib/Target/Sparc/SparcOptInfo.cpp:1.9 llvm/lib/Target/Sparc/SparcOptInfo.cpp:1.10
--- llvm/lib/Target/Sparc/SparcOptInfo.cpp:1.9	Mon Jun 30 16:58:49 2003
+++ llvm/lib/Target/Sparc/SparcOptInfo.cpp	Mon Sep  1 15:40:59 2003
@@ -1,55 +0,0 @@
-//===-- SparcOptInfo.cpp --------------------------------------------------===//
-//
-// FIXME: Describe
-//
-//===----------------------------------------------------------------------===//
-
-#include "SparcInternals.h"
-#include "llvm/Target/TargetRegInfo.h"
-#include "llvm/CodeGen/MachineInstr.h"
-#include "Config/stdlib.h"
-
-//----------------------------------------------------------------------------
-// Function: IsUselessCopy
-// Decide whether a machine instruction is a redundant copy:
-// -- ADD    with g0 and result and operand are identical, or
-// -- OR     with g0 and result and operand are identical, or
-// -- FMOVS or FMOVD and result and operand are identical.
-// Other cases are possible but very rare that they would be useless copies,
-// so it's not worth analyzing them.
-//----------------------------------------------------------------------------
-
-bool
-UltraSparcOptInfo::IsUselessCopy(const MachineInstr* MI) const {
-  if (MI->getOpCode() == V9::FMOVS || MI->getOpCode() == V9::FMOVD) {
-    return (/* both operands are allocated to the same register */
-            MI->getOperand(0).getAllocatedRegNum() == 
-            MI->getOperand(1).getAllocatedRegNum());
-  } else if (MI->getOpCode() == V9::ADDr || MI->getOpCode() == V9::ORr) {
-    unsigned srcWithDestReg;
-    
-    for (srcWithDestReg = 0; srcWithDestReg < 2; ++srcWithDestReg)
-      if (MI->getOperand(srcWithDestReg).hasAllocatedReg() &&
-          MI->getOperand(srcWithDestReg).getAllocatedRegNum()
-          == MI->getOperand(2).getAllocatedRegNum())
-        break;
-    
-    if (srcWithDestReg == 2)
-      return false;
-    else {
-      /* else source and dest are allocated to the same register */
-      unsigned otherOp = 1 - srcWithDestReg;
-      return (/* either operand otherOp is register %g0 */
-              (MI->getOperand(otherOp).hasAllocatedReg() &&
-               MI->getOperand(otherOp).getAllocatedRegNum() ==
-               target.getRegInfo().getZeroRegNum()) ||
-              
-              /* or operand otherOp == 0 */
-              (MI->getOperand(otherOp).getType()
-               == MachineOperand::MO_SignExtendedImmed &&
-               MI->getOperand(otherOp).getImmedValue() == 0));
-    }
-  }
-  else
-    return false;
-}