[llvm-commits] CVS: llvm/lib/Target/X86/X86CodeEmitter.cpp X86InstrInfo.td InstSelectSimple.cpp

[Chris Lattner]

Changes in directory llvm/lib/Target/X86:

X86CodeEmitter.cpp updated: 1.33 -> 1.34
X86InstrInfo.td updated: 1.4 -> 1.5
InstSelectSimple.cpp updated: 1.119 -> 1.120

---
Log message:

This is the real fix for the previous register allocator problem.
Physical registers should not float around.


---
Diffs of the changes:

Index: llvm/lib/Target/X86/X86CodeEmitter.cpp
diff -u llvm/lib/Target/X86/X86CodeEmitter.cpp:1.33 llvm/lib/Target/X86/X86CodeEmitter.cpp:1.34
--- llvm/lib/Target/X86/X86CodeEmitter.cpp:1.33	Sun Aug  3 16:14:38 2003
+++ llvm/lib/Target/X86/X86CodeEmitter.cpp	Mon Aug  4 19:48:46 2003
@@ -470,7 +470,7 @@
   switch (Desc.TSFlags & X86II::FormMask) {
   default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
   case X86II::Pseudo:
-    if (Opcode != X86::IMPLICIT_USE)
+    if (Opcode != X86::IMPLICIT_USE && Opcode != X86::IMPLICIT_DEF)
       std::cerr << "X86 Machine Code Emitter: No 'form', not emitting: " << MI;
     break;
 


Index: llvm/lib/Target/X86/X86InstrInfo.td
diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.4 llvm/lib/Target/X86/X86InstrInfo.td:1.5
--- llvm/lib/Target/X86/X86InstrInfo.td:1.4	Mon Aug  4 16:18:19 2003
+++ llvm/lib/Target/X86/X86InstrInfo.td	Mon Aug  4 19:48:46 2003
@@ -107,6 +107,7 @@
 def ADJCALLSTACKDOWN : X86Inst<"ADJCALLSTACKDOWN", 0, Pseudo, NoArg>;
 def ADJCALLSTACKUP   : X86Inst<"ADJCALLSTACKUP",   0, Pseudo, NoArg>;
 def IMPLICIT_USE     : X86Inst<"IMPLICIT_USE",     0, Pseudo, NoArg>;
+def IMPLICIT_DEF     : X86Inst<"IMPLICIT_DEF",     0, Pseudo, NoArg>;
 
 //===----------------------------------------------------------------------===//
 //  Control Flow Instructions...


Index: llvm/lib/Target/X86/InstSelectSimple.cpp
diff -u llvm/lib/Target/X86/InstSelectSimple.cpp:1.119 llvm/lib/Target/X86/InstSelectSimple.cpp:1.120
--- llvm/lib/Target/X86/InstSelectSimple.cpp:1.119	Sun Aug  3 21:12:48 2003
+++ llvm/lib/Target/X86/InstSelectSimple.cpp	Mon Aug  4 19:48:47 2003
@@ -646,6 +646,8 @@
       BuildMI(BB, SetCCOpcodeTab[0][OpNum], 0, X86::AL);
       BuildMI(BB, X86::CMPrr32, 2).addReg(Op0r+1).addReg(Op1r+1);
       BuildMI(BB, SetCCOpcodeTab[isSigned][OpNum], 0, X86::BL);
+      BuildMI(BB, X86::IMPLICIT_DEF, 0, X86::BH);
+      BuildMI(BB, X86::IMPLICIT_DEF, 0, X86::AH);
       BuildMI(BB, X86::CMOVErr16, 2, X86::BX).addReg(X86::BX).addReg(X86::AX);
       // NOTE: visitSetCondInst knows that the value is dumped into the BL
       // register at this point for long values...