[llvm-commits] CVS: llvm/lib/Target/Sparc/SparcV9_F2.td

[Misha Brukman]

Changes in directory llvm/lib/Target/Sparc:

SparcV9_F2.td updated: 1.3 -> 1.4

---
Log message:

Encode predict = 1 by default, because the Sparc assembler does this.


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Diffs of the changes:

Index: llvm/lib/Target/Sparc/SparcV9_F2.td
diff -u llvm/lib/Target/Sparc/SparcV9_F2.td:1.3 llvm/lib/Target/Sparc/SparcV9_F2.td:1.4
--- llvm/lib/Target/Sparc/SparcV9_F2.td:1.3	Thu Jun  5 18:33:15 2003
+++ llvm/lib/Target/Sparc/SparcV9_F2.td	Tue Jul 15 16:26:49 2003
@@ -38,21 +38,21 @@
 class F2_3<bits<4> cond, string name> : F2_br { // Format 2.3 instructions
   bits<2>  cc;
   bits<19> disp;
-  bit      predict;
+  bit      predict = 1;
   bit      annul;
 
   set Name        = name;
   set Inst{29}    = annul;
   set Inst{28-25} = cond;
   set Inst{21-20} = cc;
-  set Inst{19}    = predict;
+  set Inst{19}    = 1; // predict;
   set Inst{18-0}  = disp;
 }
 
 class F2_4<bits<3> rcond, string name> : F2_br { // Format 2.4 instructions
   bits<5>  rs1;
   bits<16> disp;
-  bit      predict;
+  bit      predict = 1;
   bit      annul;
 
   set Name        = name;
@@ -60,7 +60,7 @@
   set Inst{28}    = 0;
   set Inst{27-25} = rcond;
   set Inst{21-20} = disp{15-14};
-  set Inst{19}    = predict;
+  set Inst{19}    = 1; // predict;
   set Inst{18-14} = rs1;
   set Inst{13-0 } = disp{13-0};
 }