[llvm-commits] CVS: llvm/lib/Reoptimizer/Inst/lib/InstManip.cpp PhaseInfo.h Phases.cpp SparcInstManip.cpp SparcInstManip.h
Joel Stanley
jstanley at cs.uiuc.edu
Tue May 13 13:37:48 PDT 2003
Changes in directory llvm/lib/Reoptimizer/Inst/lib:
InstManip.cpp updated: 1.12 -> 1.13
PhaseInfo.h updated: 1.6 -> 1.7
Phases.cpp updated: 1.28 -> 1.29
SparcInstManip.cpp updated: 1.8 -> 1.9
SparcInstManip.h updated: 1.9 -> 1.10
---
Log message:
Start- and end- sites are being properly invoked.
---
Diffs of the changes:
Index: llvm/lib/Reoptimizer/Inst/lib/InstManip.cpp
diff -u llvm/lib/Reoptimizer/Inst/lib/InstManip.cpp:1.12 llvm/lib/Reoptimizer/Inst/lib/InstManip.cpp:1.13
--- llvm/lib/Reoptimizer/Inst/lib/InstManip.cpp:1.12 Wed Apr 30 12:31:47 2003
+++ llvm/lib/Reoptimizer/Inst/lib/InstManip.cpp Tue May 13 13:36:33 2003
@@ -34,8 +34,6 @@
m_insts.begin(), e = m_insts.end(); i != e; ++i) {
ostr << std::hex << " (" << i->first << ", " << std::flush;
m_pIM->printInst(i->second);
- //sparc_print(i->second); // FIXME
- fflush(stdout);
ostr << ")" << endl;
}
ostr << "}";
Index: llvm/lib/Reoptimizer/Inst/lib/PhaseInfo.h
diff -u llvm/lib/Reoptimizer/Inst/lib/PhaseInfo.h:1.6 llvm/lib/Reoptimizer/Inst/lib/PhaseInfo.h:1.7
--- llvm/lib/Reoptimizer/Inst/lib/PhaseInfo.h:1.6 Tue May 13 12:29:49 2003
+++ llvm/lib/Reoptimizer/Inst/lib/PhaseInfo.h Tue May 13 13:36:33 2003
@@ -16,7 +16,7 @@
#define DEBUG 1
#if DEBUG
#define VERBOSE 2
-#define DEBUG_MSG(v, x) if(VERBOSE >= v) std::cerr << x
+#define DEBUG_MSG(v, x) if(VERBOSE >= v) std::cerr << "[pp] " << x
#define HEX(x) std::hex << x << std::dec
#else
#define DEBUG_MSG(v, x)
@@ -30,7 +30,7 @@
unsigned short* loadVar;
unsigned gbtStartIdx;
unsigned paramSize;
- void* paramMem;
+ void* retVal;
void* instFunc;
};
Index: llvm/lib/Reoptimizer/Inst/lib/Phases.cpp
diff -u llvm/lib/Reoptimizer/Inst/lib/Phases.cpp:1.28 llvm/lib/Reoptimizer/Inst/lib/Phases.cpp:1.29
--- llvm/lib/Reoptimizer/Inst/lib/Phases.cpp:1.28 Tue May 13 12:29:49 2003
+++ llvm/lib/Reoptimizer/Inst/lib/Phases.cpp Tue May 13 13:36:33 2003
@@ -231,6 +231,7 @@
static void dumpSnippet(vector<unsigned>& snippet, InstManip* im)
{
for(vector<unsigned>::iterator j = snippet.begin(), k = snippet.end(); j != k; ++j) {
+ cerr << "[pp] " << std::flush;
im->printInst(*j);
cerr << endl;
}
@@ -262,8 +263,8 @@
vector<unsigned> snippet;
m_pIM->buildSlot(p3info, snippet);
- DEBUG_MSG(2, "phase3 slot instructions:\n");
-#if VERBOSE > 1
+ DEBUG_MSG(3, "phase3 slot instructions:\n");
+#if VERBOSE > 2
dumpSnippet(snippet, m_pIM);
#endif
@@ -322,7 +323,7 @@
DEBUG_MSG(1, "There are " << candidates.size() << " candidates to process\n");
for(unsigned i = 0, e = candidates.size(); i < e; ++i) {
- DEBUG_MSG(1, "Transforming " << candidates[i] << endl);
+ DEBUG_MSG(2, "Transforming " << candidates[i] << endl);
unsigned slotSize = m_pIM->getSlotSize(this, candidates[i]);
// Replace load candidate instruction with a branch to the start of a new slot.
@@ -337,8 +338,8 @@
vector<unsigned> snippet;
m_pIM->buildSlot(p4info, snippet);
- DEBUG_MSG(2, "phase4 slot instructions:\n");
-#if VERBOSE > 1
+ DEBUG_MSG(3, "phase4 slot instructions:\n");
+#if VERBOSE > 2
dumpSnippet(snippet, m_pIM);
#endif
@@ -398,11 +399,11 @@
static void dumpGBT(std::ostream& ostr)
{
- ostr << "ppGBT is: " << ppGBT << endl;
- ostr << "ppGBTSize is: " << ppGBTSize << endl;
+ ostr << "[pp] ppGBT is: " << ppGBT << endl;
+ ostr << "[pp] ppGBTSize is: " << ppGBTSize << endl;
for(unsigned i = 0; i < ppGBTSize; ++i) {
- ostr << "ppGBT[" << i << "]: " << ppGBT[i].gbtType << ", "
+ ostr << "[pp] ppGBT[" << i << "]: " << ppGBT[i].gbtType << ", "
<< ppGBT[i].loadVar << ", " << ppGBT[i].gbtStartIdx << endl;
}
}
@@ -451,8 +452,8 @@
vector<unsigned> snippet;
m_pIM->buildSlot(gbte, slotBase, repAddr, m_pPhase4Info->getRange(), snippet);
- DEBUG_MSG(2, "phase 5 slot contents:\n");
-#if VERBOSE > 1
+ DEBUG_MSG(3, "phase 5 slot contents:\n");
+#if VERBOSE > 2
dumpSnippet(snippet, m_pIM);
#endif
@@ -495,33 +496,27 @@
void phase5(GBTElem* gbte)
{
- DEBUG_MSG(1, "phase5 function invoked\n");
- DEBUG_MSG(1, "Calling instrumentation function...\n");
-
switch(gbte->gbtType){
case pp::GBT_INTERVAL_START: {
DEBUG_MSG(1, "--- phase 5 start site invocation ---\n");
- DEBUG_MSG(1, "paramMem address is " << HEX(gbte->paramMem) << endl);
+ DEBUG_MSG(2, "retVal address is " << HEX(gbte->retVal) << endl);
void (*instFunc)(void*) = (void (*)(void*)) gbte->instFunc;
- instFunc(gbte->paramMem);
+ instFunc(gbte->retVal);
break;
}
case pp::GBT_INTERVAL_END: {
- DEBUG_MSG(1, "--- phase 5 start site invocation ---\n");
- DEBUG_MSG(1, "start parameter is at gbt index " << gbte->gbtStartIdx << endl);
- DEBUG_MSG(1, "start parameter addr is "
- << HEX(ppGBT[gbte->gbtStartIdx].paramMem) << endl);
+ DEBUG_MSG(1, "--- phase 5 end site invocation ---\n");
+ DEBUG_MSG(2, "start parameter is at gbt index " << gbte->gbtStartIdx << endl);
+ DEBUG_MSG(2, "start parameter addr is "
+ << HEX(ppGBT[gbte->gbtStartIdx].retVal) << endl);
- double tmphack;
-
void (*instFunc)(void*, void*) = (void (*)(void*, void*)) gbte->instFunc;
- instFunc((void*) &tmphack, ppGBT[gbte->gbtStartIdx].paramMem);
+ instFunc(gbte->retVal, ppGBT[gbte->gbtStartIdx].retVal);
- DEBUG_MSG(1, "called end inst func, retval is " << tmphack << endl);
break;
}
}
- DEBUG_MSG(1, "phase 5 function exiting\n");
+ DEBUG_MSG(1, "--- phase 5 invocation completed ---\n");
}
Index: llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.cpp
diff -u llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.cpp:1.8 llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.cpp:1.9
--- llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.cpp:1.8 Tue May 13 12:29:50 2003
+++ llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.cpp Tue May 13 13:36:33 2003
@@ -168,23 +168,69 @@
"Snippet size does not match expected slot size");
}
+static unsigned getSPSub(unsigned size)
+{
+ return MK_ADD_R_I(R_O6, R_O6, -size);
+}
+
void SparcInstManip::buildSlot(GBTElem* gbte,
uint64_t slotBase,
uint64_t instAddr,
const std::pair<uint64_t, uint64_t>& extents,
std::vector<unsigned>& snippet)
{
- switch(gbte->gbtType) {
- case pp::GBT_INTERVAL_START:
- buildStartIntervalSlot(gbte, slotBase, instAddr, extents, snippet);
- return;
- case pp::GBT_INTERVAL_END:
- buildEndIntervalSlot(gbte, slotBase, instAddr, extents, snippet);
- return;
- default:
- assert(0 && "Unhandled gbtType encountered");
- return;
+ unsigned sharedSize = WORD_WIDTH * getSharedSize();
+ unsigned stkSize = STKFRM_MIN + sharedSize + WORD_WIDTH * 2;
+
+ if(stkSize % STACK_ALIGN != 0) {
+ // Pad up to next multiple of STACK_ALIGN; assumes STACK_ALIGN = 2 * WORD_WIDTH
+ stkSize += WORD_WIDTH;
+ assert(stkSize % STACK_ALIGN == 0 && "Alignment adjustment failed");
}
+
+ DEBUG_MSG(2, "buildStartSlot stack offset is " << stkSize << endl);
+
+ // For start interval sites, heap-allocate enough memory for the return value of the
+ // instrumentation function.
+
+ if(gbte->gbtType == pp::GBT_INTERVAL_START) {
+ assert(!gbte->retVal && "Expected null retVal value");
+ gbte->retVal = static_cast<void*>(new char[gbte->paramSize]);
+ }
+
+ // After the alloca, our stack region looks like:
+ // sp + BIAS + stkSize -> +--------------------------------+
+ // | alignment padding |
+ // +--------------------------------+
+ // | save area for clobbered regs | } WORD_WIDTH * 2
+ // +--------------------------------+
+ // | spill region for shared regs | } sharedSize
+ // sp + BIAS + STKFRM_MIN -> +--------------------------------+
+ //
+
+ startCode(snippet);
+
+ generateSPSub(stkSize);
+
+ // "Manually" save REG_0, REG_1
+ generateStackStore(REG_0, STKFRM_MIN + sharedSize);
+ generateStackStore(REG_1, STKFRM_MIN + sharedSize + WORD_WIDTH);
+
+ generateSpillShared(STKFRM_MIN);
+
+ generateLoad((uint64_t) gbte, REG_0, REG_1); // REG_0 live to call
+ generateStackStore(REG_0, PARAM_0);
+
+ generateCall((uint64_t) &phase5, slotBase);
+ generateRestoreShared(STKFRM_MIN);
+
+ // "Manually" restore REG_0, REG_1
+ generateStackLoad(REG_0, STKFRM_MIN + sharedSize);
+ generateStackLoad(REG_1, STKFRM_MIN + sharedSize + WORD_WIDTH);
+
+ generateBranchAlways(instAddr + getInstWidth(), slotBase, getSPSub(-stkSize));
+
+ endCode();
}
unsigned SparcInstManip::getSlotSize(Phase2* p2) const
@@ -303,11 +349,6 @@
"Unexpected number of instructions in code sequence for SP load");
}
-static unsigned getSPSub(unsigned size)
-{
- return MK_ADD_R_I(R_O6, R_O6, -size);
-}
-
// generateSPSub - Generate code to allocate 'size' bytes on the stack
void SparcInstManip::generateSPSub(unsigned size)
@@ -884,99 +925,3 @@
assert(0 && "Failed to find alloca marker");
return 0;
}
-
-void SparcInstManip::buildStartIntervalSlot(GBTElem* gbte,
- uint64_t slotBase,
- uint64_t instAddr,
- const std::pair<uint64_t, uint64_t>& extents,
- std::vector<unsigned>& snippet)
-{
- unsigned sharedSize = WORD_WIDTH * getSharedSize();
- unsigned stkSize = STKFRM_MIN + sharedSize + WORD_WIDTH * 2;
-
- if(stkSize % STACK_ALIGN != 0) {
- // Pad up to next multiple of STACK_ALIGN; assumes STACK_ALIGN = 2 * WORD_WIDTH
- stkSize += WORD_WIDTH;
- assert(stkSize % STACK_ALIGN == 0 && "Alignment adjustment failed");
- }
-
- DEBUG_MSG(1, "buildStartSlot stack offset is " << stkSize << endl);
-
- // Heap-allocate enough memory for the return value of the instrumentation function.
- assert(!gbte->paramMem && "Expected null paramMem value");
- gbte->paramMem = static_cast<void*>(new char[gbte->paramSize]);
-
- // After the alloca, our stack region looks like:
- // sp + BIAS + stkSize -> +--------------------------------+
- // | alignment padding |
- // +--------------------------------+
- // | save area for clobbered regs | } WORD_WIDTH * 2
- // +--------------------------------+
- // | spill region for shared regs | } sharedSize
- // sp + BIAS + STKFRM_MIN -> +--------------------------------+
- //
-
- startCode(snippet);
-
- generateSPSub(stkSize);
-
- // "Manually" save REG_0, REG_1
- generateStackStore(REG_0, STKFRM_MIN + sharedSize);
- generateStackStore(REG_1, STKFRM_MIN + sharedSize + WORD_WIDTH);
-
- generateSpillShared(STKFRM_MIN);
-
- generateLoad((uint64_t) gbte, REG_0, REG_1); // REG_0 live to call
- generateStackStore(REG_0, PARAM_0);
-
- generateCall((uint64_t) &phase5, slotBase);
- generateRestoreShared(STKFRM_MIN);
-
- // "Manually" restore REG_0, REG_1
- generateStackLoad(REG_0, STKFRM_MIN + sharedSize);
- generateStackLoad(REG_1, STKFRM_MIN + sharedSize + WORD_WIDTH);
-
- generateBranchAlways(instAddr + getInstWidth(), slotBase, getSPSub(-stkSize));
-
- endCode();
-}
-
-void SparcInstManip::buildEndIntervalSlot(GBTElem* gbte,
- uint64_t slotBase,
- uint64_t instAddr,
- const std::pair<uint64_t, uint64_t>& extents,
- std::vector<unsigned>& snippet)
-{
- unsigned sharedSize = WORD_WIDTH * getSharedSize();
- unsigned stkSize = STKFRM_MIN + sharedSize + WORD_WIDTH * 2;
-
- if(stkSize % STACK_ALIGN != 0) {
- // Pad up to next multiple of STACK_ALIGN; assumes STACK_ALIGN = 2 * WORD_WIDTH
- stkSize += WORD_WIDTH;
- assert(stkSize % STACK_ALIGN == 0 && "Alignment adjustment failed");
- }
-
- DEBUG_MSG(1, "buildEndSlot stack offset is " << stkSize << endl);
-
- startCode(snippet);
- generateSPSub(stkSize);
-
- // "Manually" save REG_0, REG_1
- generateStackStore(REG_0, STKFRM_MIN + sharedSize);
- generateStackStore(REG_1, STKFRM_MIN + sharedSize + WORD_WIDTH);
-
- generateSpillShared(STKFRM_MIN);
- generateLoad((uint64_t) gbte, REG_0, REG_1); // REG_0 live to call
- generateStackStore(REG_0, PARAM_0);
- generateCall((uint64_t) &phase5, slotBase);
- generateRestoreShared(STKFRM_MIN);
-
- // "Manually" restore REG_0, REG_1
- generateStackLoad(REG_0, STKFRM_MIN + sharedSize);
- generateStackLoad(REG_1, STKFRM_MIN + sharedSize + WORD_WIDTH);
- generateBranchAlways(instAddr + getInstWidth(), slotBase, getSPSub(-stkSize));
-
- endCode();
-}
-
-
Index: llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.h
diff -u llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.h:1.9 llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.h:1.10
--- llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.h:1.9 Tue May 13 12:29:50 2003
+++ llvm/lib/Reoptimizer/Inst/lib/SparcInstManip.h Tue May 13 13:36:34 2003
@@ -112,18 +112,6 @@
unsigned findAllocaOffset(uint64_t instAddr,
const std::pair<uint64_t, uint64_t>& range);
- void buildStartIntervalSlot(GBTElem* gbte,
- uint64_t slotBase,
- uint64_t instAddr,
- const std::pair<uint64_t, uint64_t>& extents,
- std::vector<unsigned>& snippet);
-
- void buildEndIntervalSlot(GBTElem* gbte,
- uint64_t slotBase,
- uint64_t instAddr,
- const std::pair<uint64_t, uint64_t>& extents,
- std::vector<unsigned>& snippet);
-
static bool isAllocaSignature(unsigned inst, unsigned& offset);
std::vector<unsigned>* m_pCurrSnippet;
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