[llvm-commits] CVS: llvm/include/llvm/Target/MachineInstrInfo.h

[Chris Lattner]

Changes in directory llvm/include/llvm/Target:

MachineInstrInfo.h updated: 1.39 -> 1.40

---
Log message:

Sparc specific methods default to abort rather than being pure virtual


---
Diffs of the changes:

Index: llvm/include/llvm/Target/MachineInstrInfo.h
diff -u llvm/include/llvm/Target/MachineInstrInfo.h:1.39 llvm/include/llvm/Target/MachineInstrInfo.h:1.40
--- llvm/include/llvm/Target/MachineInstrInfo.h:1.39	Tue Dec 24 23:01:46 2002
+++ llvm/include/llvm/Target/MachineInstrInfo.h	Sat Dec 28 14:12:54 2002
@@ -267,12 +267,15 @@
 
   //-------------------------------------------------------------------------
   // Code generation support for creating individual machine instructions
+  //
+  // WARNING: These methods are Sparc specific
+  //
   //-------------------------------------------------------------------------
 
   // Get certain common op codes for the current target.  this and all the
   // Create* methods below should be moved to a machine code generation class
   // 
-  virtual MachineOpCode getNOPOpCode() const = 0;
+  virtual MachineOpCode getNOPOpCode() const { abort(); }
 
   // Create an instruction sequence to put the constant `val' into
   // the virtual register `dest'.  `val' may be a Constant or a
@@ -287,7 +290,9 @@
                                       Value* val,
                                       Instruction* dest,
                                       std::vector<MachineInstr*>& mvec,
-                                      MachineCodeForInstruction& mcfi) const=0;
+                                      MachineCodeForInstruction& mcfi) const {
+    abort();
+  }
   
   // Create an instruction sequence to copy an integer value `val'
   // to a floating point value `dest' by copying to memory and back.
@@ -296,12 +301,14 @@
   // Any temp. registers (TmpInstruction) created are recorded in mcfi.
   // Any stack space required is allocated via mcff.
   // 
-  virtual void  CreateCodeToCopyIntToFloat(const TargetMachine& target,
-                                       Function* F,
-                                       Value* val,
-                                       Instruction* dest,
-                                       std::vector<MachineInstr*>& mvec,
-                                       MachineCodeForInstruction& mcfi)const=0;
+  virtual void CreateCodeToCopyIntToFloat(const TargetMachine& target,
+					  Function* F,
+					  Value* val,
+					  Instruction* dest,
+					  std::vector<MachineInstr*>& mvec,
+					  MachineCodeForInstruction& MI) const {
+    abort();
+  }
 
   // Similarly, create an instruction sequence to copy an FP value
   // `val' to an integer value `dest' by copying to memory and back.
@@ -309,12 +316,14 @@
   // Any temp. registers (TmpInstruction) created are recorded in mcfi.
   // Any stack space required is allocated via mcff.
   // 
-  virtual void  CreateCodeToCopyFloatToInt(const TargetMachine& target,
-                                       Function* F,
-                                       Value* val,
-                                       Instruction* dest,
-                                       std::vector<MachineInstr*>& mvec,
-                                       MachineCodeForInstruction& mcfi)const=0;
+  virtual void CreateCodeToCopyFloatToInt(const TargetMachine& target,
+					  Function* F,
+					  Value* val,
+					  Instruction* dest,
+					  std::vector<MachineInstr*>& mvec,
+					  MachineCodeForInstruction& MI) const {
+    abort();
+  }
   
   // Create instruction(s) to copy src to dest, for arbitrary types
   // The generated instructions are returned in `mvec'.
@@ -322,11 +331,13 @@
   // Any stack space required is allocated via mcff.
   // 
   virtual void CreateCopyInstructionsByType(const TargetMachine& target,
-                                       Function* F,
-                                       Value* src,
-                                       Instruction* dest,
-                                       std::vector<MachineInstr*>& mvec,
-                                       MachineCodeForInstruction& mcfi)const=0;
+					    Function* F,
+					    Value* src,
+					    Instruction* dest,
+					    std::vector<MachineInstr*>& mvec,
+                                          MachineCodeForInstruction& MI) const {
+    abort();
+  }
 
   // Create instruction sequence to produce a sign-extended register value
   // from an arbitrary sized value (sized in bits, not bytes).
@@ -340,7 +351,9 @@
                                        Value* destVal,
                                        unsigned numLowBits,
                                        std::vector<MachineInstr*>& mvec,
-                                       MachineCodeForInstruction& mcfi) const=0;
+				       MachineCodeForInstruction& MI) const {
+    abort();
+  }
 
   // Create instruction sequence to produce a zero-extended register value
   // from an arbitrary sized value (sized in bits, not bytes).
@@ -354,7 +367,9 @@
                                        Value* destVal,
                                        unsigned srcSizeInBits,
                                        std::vector<MachineInstr*>& mvec,
-                                       MachineCodeForInstruction& mcfi) const=0;
+                                       MachineCodeForInstruction& mcfi) const {
+    abort();
+  }
 };
 
 #endif