[llvm-commits] CVS: llvm/lib/Target/X86/MachineCodeEmitter.cpp Printer.cpp

Chris Lattner lattner at cs.uiuc.edu
Mon Dec 23 17:47:01 PST 2002


Changes in directory llvm/lib/Target/X86:

MachineCodeEmitter.cpp updated: 1.14 -> 1.15
Printer.cpp updated: 1.29 -> 1.30

---
Log message:

Add support for the bswap instruction


---
Diffs of the changes:

Index: llvm/lib/Target/X86/MachineCodeEmitter.cpp
diff -u llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.14 llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.15
--- llvm/lib/Target/X86/MachineCodeEmitter.cpp:1.14	Thu Dec 19 22:12:48 2002
+++ llvm/lib/Target/X86/MachineCodeEmitter.cpp	Mon Dec 23 17:46:00 2002
@@ -238,7 +238,8 @@
     break;
   case X86II::AddRegFrm:
     MCE.emitByte(BaseOpcode + getX86RegNum(MI.getOperand(0).getReg()));
-    if (MI.getNumOperands() == 2) {
+    if (MI.getNumOperands() == 2 && (MI.getOperand(1).isImmediate() ||
+	MI.getOperand(1).getVRegValueOrNull())) {
       unsigned Size = sizeOfPtr(Desc);
       if (Value *V = MI.getOperand(1).getVRegValueOrNull()) {
         assert(Size == 4 && "Don't know how to emit non-pointer values!");


Index: llvm/lib/Target/X86/Printer.cpp
diff -u llvm/lib/Target/X86/Printer.cpp:1.29 llvm/lib/Target/X86/Printer.cpp:1.30
--- llvm/lib/Target/X86/Printer.cpp:1.29	Sun Dec 15 15:13:40 2002
+++ llvm/lib/Target/X86/Printer.cpp	Mon Dec 23 17:46:00 2002
@@ -196,20 +196,22 @@
     // or it takes a register and an immediate of the same size as the register
     // (move immediate f.e.).  Note that this immediate value might be stored as
     // an LLVM value, to represent, for example, loading the address of a global
-    // into a register.
+    // into a register.  The initial register might be duplicated if this is a
+    // M_2_ADDR_REG instruction
     //
     assert(MI->getOperand(0).isRegister() &&
            (MI->getNumOperands() == 1 || 
             (MI->getNumOperands() == 2 &&
              (MI->getOperand(1).getVRegValueOrNull() ||
-              MI->getOperand(1).isImmediate()))) &&
+              MI->getOperand(1).isImmediate() ||
+	      MI->getOperand(1).isRegister()))) &&
            "Illegal form for AddRegFrm instruction!");
 
     unsigned Reg = MI->getOperand(0).getReg();
     
     O << getName(MI->getOpCode()) << " ";
     printOp(O, MI->getOperand(0), RI);
-    if (MI->getNumOperands() == 2) {
+    if (MI->getNumOperands() == 2 && !MI->getOperand(1).isRegister()) {
       O << ", ";
       printOp(O, MI->getOperand(1), RI);
     }





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