[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocLocal.cpp RegAllocSimple.cpp
Chris Lattner
lattner at cs.uiuc.edu
Mon Dec 16 22:20:02 PST 2002
Changes in directory llvm/lib/CodeGen:
RegAllocLocal.cpp updated: 1.4 -> 1.5
RegAllocSimple.cpp updated: 1.30 -> 1.31
---
Log message:
Use new reginfo interface
---
Diffs of the changes:
Index: llvm/lib/CodeGen/RegAllocLocal.cpp
diff -u llvm/lib/CodeGen/RegAllocLocal.cpp:1.4 llvm/lib/CodeGen/RegAllocLocal.cpp:1.5
--- llvm/lib/CodeGen/RegAllocLocal.cpp:1.4 Mon Dec 16 21:16:10 2002
+++ llvm/lib/CodeGen/RegAllocLocal.cpp Mon Dec 16 22:19:40 2002
@@ -12,29 +12,6 @@
#include "Support/Statistic.h"
#include <iostream>
-/// PhysRegClassMap - Construct a mapping of physical register numbers to their
-/// register classes.
-///
-/// NOTE: This class will eventually be pulled out to somewhere shared.
-///
-class PhysRegClassMap {
- std::map<unsigned, const TargetRegisterClass*> PhysReg2RegClassMap;
-public:
- PhysRegClassMap(const MRegisterInfo &RI) {
- for (MRegisterInfo::const_iterator I = RI.regclass_begin(),
- E = RI.regclass_end(); I != E; ++I)
- for (unsigned i=0; i < (*I)->getNumRegs(); ++i)
- PhysReg2RegClassMap[(*I)->getRegister(i)] = *I;
- }
-
- const TargetRegisterClass *operator[](unsigned Reg) {
- assert(PhysReg2RegClassMap[Reg] && "Register is not a known physreg!");
- return PhysReg2RegClassMap[Reg];
- }
-
- const TargetRegisterClass *get(unsigned Reg) { return operator[](Reg); }
-};
-
namespace {
Statistic<> NumSpilled ("ra-local", "Number of registers spilled");
Statistic<> NumReloaded("ra-local", "Number of registers reloaded");
@@ -45,7 +22,6 @@
const MRegisterInfo &RegInfo;
const MachineInstrInfo &MIInfo;
unsigned NumBytesAllocated;
- PhysRegClassMap PhysRegClasses;
// Maps SSA Regs => offsets on the stack where these values are stored
std::map<unsigned, unsigned> VirtReg2OffsetMap;
@@ -89,8 +65,7 @@
public:
RA(TargetMachine &tm)
- : TM(tm), RegInfo(*tm.getRegisterInfo()), MIInfo(tm.getInstrInfo()),
- PhysRegClasses(RegInfo) {
+ : TM(tm), RegInfo(*tm.getRegisterInfo()), MIInfo(tm.getInstrInfo()) {
cleanupAfterFunction();
}
@@ -302,7 +277,7 @@
unsigned R = PhysRegsUseOrder[i];
// If the current register is compatible, use it.
if (isAllocatableRegister(R)) {
- if (PhysRegClasses[R] == RegClass) {
+ if (RegInfo.getRegClass(R) == RegClass) {
PhysReg = R;
break;
} else {
@@ -310,7 +285,7 @@
// compatible, use it.
if (const unsigned *AliasSet = RegInfo.getAliasSet(R))
for (unsigned a = 0; AliasSet[a]; ++a)
- if (PhysRegClasses[AliasSet[a]] == RegClass) {
+ if (RegInfo.getRegClass(AliasSet[a]) == RegClass) {
PhysReg = AliasSet[a]; // Take an aliased register
break;
}
@@ -561,7 +536,7 @@
const unsigned *CSRegs = RegInfo.getCalleeSaveRegs();
for (unsigned i = 0; CSRegs[i]; ++i) {
- const TargetRegisterClass *RegClass = PhysRegClasses[CSRegs[i]];
+ const TargetRegisterClass *RegClass = RegInfo.getRegClass(CSRegs[i]);
unsigned Offset = getStackSpaceFor(CSRegs[i], RegClass);
// Insert the spill to the stack frame...
@@ -584,7 +559,7 @@
const unsigned *CSRegs = RegInfo.getCalleeSaveRegs();
for (unsigned i = 0; CSRegs[i]; ++i) {
- const TargetRegisterClass *RegClass = PhysRegClasses[CSRegs[i]];
+ const TargetRegisterClass *RegClass = RegInfo.getRegClass(CSRegs[i]);
unsigned Offset = getStackSpaceFor(CSRegs[i], RegClass);
++NumReloaded;
I = RegInfo.loadRegOffset2Reg(MBB, I, CSRegs[i], RegInfo.getFramePointer(),
@@ -606,8 +581,9 @@
// blocks.
// FIXME: In this pass, count how many uses of each VReg exist!
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
- MBB != MBBe; ++MBB)
+ MBB != MBBe; ++MBB) {
EliminatePHINodes(*MBB);
+ }
// Loop over all of the basic blocks, eliminating virtual register references
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
Index: llvm/lib/CodeGen/RegAllocSimple.cpp
diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.30 llvm/lib/CodeGen/RegAllocSimple.cpp:1.31
--- llvm/lib/CodeGen/RegAllocSimple.cpp:1.30 Mon Dec 16 11:42:40 2002
+++ llvm/lib/CodeGen/RegAllocSimple.cpp Mon Dec 16 22:19:40 2002
@@ -62,6 +62,13 @@
/// in predecessor basic blocks.
void EliminatePHINodes(MachineBasicBlock &MBB);
+ /// EmitPrologue/EmitEpilogue - Use the register info object to add a
+ /// prologue/epilogue to the function and save/restore any callee saved
+ /// registers we are responsible for.
+ ///
+ void EmitPrologue();
+ void EmitEpilogue(MachineBasicBlock &MBB);
+
/// getStackSpaceFor - This returns the offset of the specified virtual
/// register on the stack, allocating space if neccesary.
@@ -307,6 +314,55 @@
}
}
+
+/// EmitPrologue - Use the register info object to add a prologue to the
+/// function and save any callee saved registers we are responsible for.
+///
+void RegAllocSimple::EmitPrologue() {
+ // Get a list of the callee saved registers, so that we can save them on entry
+ // to the function.
+ //
+ MachineBasicBlock &MBB = MF->front(); // Prolog goes in entry BB
+ MachineBasicBlock::iterator I = MBB.begin();
+
+ const unsigned *CSRegs = RegInfo->getCalleeSaveRegs();
+ for (unsigned i = 0; CSRegs[i]; ++i) {
+ const TargetRegisterClass *RegClass = RegInfo->getRegClass(CSRegs[i]);
+ unsigned Offset = getStackSpaceFor(CSRegs[i], RegClass);
+
+ // Insert the spill to the stack frame...
+ I = RegInfo->storeReg2RegOffset(MBB, I,CSRegs[i],RegInfo->getFramePointer(),
+ -Offset, RegClass->getDataSize());
+ ++NumSpilled;
+ }
+
+ // Add prologue to the function...
+ RegInfo->emitPrologue(*MF, NumBytesAllocated);
+}
+
+
+/// EmitEpilogue - Use the register info object to add a epilogue to the
+/// function and restore any callee saved registers we are responsible for.
+///
+void RegAllocSimple::EmitEpilogue(MachineBasicBlock &MBB) {
+ // Insert instructions before the return.
+ MachineBasicBlock::iterator I = --MBB.end();
+
+ const unsigned *CSRegs = RegInfo->getCalleeSaveRegs();
+ for (unsigned i = 0; CSRegs[i]; ++i) {
+ const TargetRegisterClass *RegClass = RegInfo->getRegClass(CSRegs[i]);
+ unsigned Offset = getStackSpaceFor(CSRegs[i], RegClass);
+
+ I = RegInfo->loadRegOffset2Reg(MBB, I, CSRegs[i],RegInfo->getFramePointer(),
+ -Offset, RegClass->getDataSize());
+ --I; // Insert in reverse order
+ ++NumReloaded;
+ }
+
+ RegInfo->emitEpilogue(MBB, NumBytesAllocated);
+}
+
+
/// runOnMachineFunction - Register allocate the whole function
///
bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
@@ -328,8 +384,8 @@
// FIXME: This is X86 specific! Move to frame manager
NumBytesAllocated = (NumBytesAllocated + 3) & ~3;
- // Add prologue to the function...
- RegInfo->emitPrologue(Fn, NumBytesAllocated);
+ // Emit a prologue for the function...
+ EmitPrologue();
const MachineInstrInfo &MII = TM.getInstrInfo();
@@ -338,7 +394,7 @@
MBB != MBBe; ++MBB) {
// If last instruction is a return instruction, add an epilogue
if (MII.isReturn(MBB->back()->getOpcode()))
- RegInfo->emitEpilogue(*MBB, NumBytesAllocated);
+ EmitEpilogue(*MBB);
}
cleanupAfterFunction();
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