[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocSimple.cpp

Chris Lattner lattner at cs.uiuc.edu
Sun Dec 15 12:40:01 PST 2002


Changes in directory llvm/lib/CodeGen:

RegAllocSimple.cpp updated: 1.15 -> 1.16

---
Log message:

pull inverse reg class mapping into a class that is sharable and out of the 
target register description classes.


---
Diffs of the changes:

Index: llvm/lib/CodeGen/RegAllocSimple.cpp
diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.15 llvm/lib/CodeGen/RegAllocSimple.cpp:1.16
--- llvm/lib/CodeGen/RegAllocSimple.cpp:1.15	Sun Dec 15 12:19:24 2002
+++ llvm/lib/CodeGen/RegAllocSimple.cpp	Sun Dec 15 12:38:59 2002
@@ -11,6 +11,30 @@
 #include "Support/Statistic.h"
 #include <iostream>
 
+/// PhysRegClassMap - Construct a mapping of physical register numbers to their
+/// register classes.
+///
+/// NOTE: This class will eventually be pulled out to somewhere shared.
+///
+class PhysRegClassMap {
+  std::map<unsigned, const TargetRegisterClass*> PhysReg2RegClassMap;
+public:
+  PhysRegClassMap(const MRegisterInfo *RI) {
+    for (MRegisterInfo::const_iterator I = RI->regclass_begin(),
+           E = RI->regclass_end(); I != E; ++I)
+      for (unsigned i=0; i < (*I)->getNumRegs(); ++i)
+        PhysReg2RegClassMap[(*I)->getRegister(i)] = *I;
+  }
+
+  const TargetRegisterClass *operator[](unsigned Reg) {
+    assert(PhysReg2RegClassMap[Reg] && "Register is not a known physreg!");
+    return PhysReg2RegClassMap[Reg];
+  }
+
+  const TargetRegisterClass *get(unsigned Reg) { return operator[](Reg); }
+};
+
+
 namespace {
   struct RegAllocSimple : public FunctionPass {
     TargetMachine &TM;
@@ -27,7 +51,7 @@
     std::map<unsigned, unsigned> SSA2PhysRegMap;
 
     // Maps physical register to their register classes
-    std::map<unsigned, const TargetRegisterClass*> PhysReg2RegClassMap;
+    PhysRegClassMap PhysRegClasses;
 
     // Made to combat the incorrect allocation of r2 = add r1, r1
     std::map<unsigned, unsigned> VirtReg2PhysRegMap;
@@ -40,11 +64,9 @@
 
     RegAllocSimple(TargetMachine &tm) : TM(tm), CurrMBB(0), maxOffset(0), 
                                         RegInfo(tm.getRegisterInfo()),
-                                        ByteAlignment(4)
+                                        ByteAlignment(4),
+                                        PhysRegClasses(RegInfo)
     {
-      // build reverse mapping for physReg -> register class
-      RegInfo->buildReg2RegClassMap(PhysReg2RegClassMap);
-
       RegsUsed[RegInfo->getFramePointer()] = 1;
       RegsUsed[RegInfo->getStackPointer()] = 1;
 
@@ -248,7 +270,7 @@
 
       // Find the register class of the target register: should be the
       // same as the values we're trying to store there
-      const TargetRegisterClass* regClass = PhysReg2RegClassMap[physReg];
+      const TargetRegisterClass* regClass = PhysRegClasses[physReg];
       assert(regClass && "Target register class not found!");
       unsigned dataSize = regClass->getDataSize();
 





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